195 lines
4.2 KiB
C
Executable File
195 lines
4.2 KiB
C
Executable File
/* linux/include/soc/samsung/exynos-dm.h
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*
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* Copyright (C) 2016 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* EXYNOS5 - Header file for exynos DVFS Manager support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __EXYNOS_DM_H
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#define __EXYNOS_DM_H
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#define EXYNOS_DM_MODULE_NAME "exynos-dm"
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#define EXYNOS_DM_TYPE_NAME_LEN 16
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#define EXYNOS_DM_ATTR_NAME_LEN (EXYNOS_DM_TYPE_NAME_LEN + 12)
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#define EXYNOS_DM_RELATION_L 0
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#define EXYNOS_DM_RELATION_H 1
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enum exynos_dm_type {
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DM_CPU_CL0 = 0,
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DM_CPU_CL1,
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DM_MIF,
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DM_INT,
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DM_INTCAM,
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DM_FSYS0,
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DM_CAM,
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DM_DISP,
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DM_AUD,
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DM_IVA,
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DM_SCORE,
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DM_GPU,
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DM_TYPE_END
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};
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static const char dm_type_name[DM_TYPE_END][EXYNOS_DM_TYPE_NAME_LEN] = {
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"dm_cpu_cl0",
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"dm_cpu_cl1",
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"dm_mif",
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"dm_int",
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"dm_intcam",
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"dm_fsys0",
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"dm_cam",
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"dm_disp",
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"dm_aud",
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"dm_iva",
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"dm_score",
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"dm_gpu",
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};
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enum exynos_constraint_type {
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CONSTRAINT_MIN = 0,
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CONSTRAINT_MAX,
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CONSTRAINT_END
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};
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enum dvfs_direction {
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DOWN = 0,
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UP,
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DIRECTION_END
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};
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struct exynos_dm_freq {
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u32 master_freq;
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u32 constraint_freq;
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};
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struct exynos_dm_attrs {
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struct device_attribute attr;
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char name[EXYNOS_DM_ATTR_NAME_LEN];
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};
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struct exynos_dm_constraint {
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struct list_head node;
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bool guidance; /* check constraint table by hw guide */
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u32 table_length;
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enum exynos_constraint_type constraint_type;
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int constraint_dm_type;
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char dm_type_name[EXYNOS_DM_TYPE_NAME_LEN];
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struct exynos_dm_freq *freq_table;
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u32 min_freq;
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u32 max_freq;
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u32 master_freq;
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struct exynos_dm_constraint *sub_constraint;
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};
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struct exynos_dm_data {
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bool available; /* use for DVFS domain available */
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#ifdef CONFIG_EXYNOS_ACPM
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bool policy_use;
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#endif
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int dm_type;
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char dm_type_name[EXYNOS_DM_TYPE_NAME_LEN];
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u32 min_freq;
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u32 max_freq;
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u32 cur_freq;
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u32 target_freq;
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u32 gov_min_freq;
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u32 policy_min_freq;
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u32 policy_max_freq;
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int (*freq_scaler)(int dm_type, void *devdata, u32 target_freq, unsigned int relation);
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struct list_head min_clist;
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struct list_head max_clist;
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u32 constraint_checked;
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#ifdef CONFIG_EXYNOS_ACPM
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u32 cal_id;
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#endif
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void *devdata;
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struct exynos_dm_attrs dm_policy_attr;
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struct exynos_dm_attrs constraint_table_attr;
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};
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struct exynos_dm_device {
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struct device *dev;
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struct mutex lock;
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int domain_count;
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struct exynos_dm_data *dm_data;
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};
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/* External Function call */
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#if defined(CONFIG_EXYNOS_DVFS_MANAGER)
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int exynos_dm_data_init(int dm_type, void *data,
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u32 min_freq, u32 max_freq, u32 cur_freq);
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int register_exynos_dm_constraint_table(int dm_type,
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struct exynos_dm_constraint *constraint);
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int unregister_exynos_dm_constraint_table(int dm_type,
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struct exynos_dm_constraint *constraint);
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int register_exynos_dm_freq_scaler(int dm_type,
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int (*scaler_func)(int dm_type, void *devdata, u32 target_freq, unsigned int relation));
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int unregister_exynos_dm_freq_scaler(int dm_type);
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int policy_update_call_to_DM(int dm_type, u32 min_freq, u32 max_freq);
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int DM_CALL(int dm_type, unsigned long *target_freq);
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int policy_update_with_DM_CALL(int dm_type, u32 min_freq, u32 max_freq, unsigned long *target_freq);
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#else
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static inline
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int exynos_dm_data_init(int dm_type, void *data,
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u32 min_freq, u32 max_freq, u32 cur_freq)
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{
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return 0;
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}
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static inline
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int register_exynos_dm_constraint_table(int dm_type,
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struct exynos_dm_constraint *constraint)
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{
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return 0;
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}
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static inline
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int unregister_exynos_dm_constraint_table(int dm_type,
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struct exynos_dm_constraint *constraint)
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{
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return 0;
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}
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static inline
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int register_exynos_dm_freq_scaler(int dm_type,
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int (*scaler_func)(int dm_type, void *devdata, u32 target_freq, unsigned int relation))
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{
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return 0;
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}
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static inline
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int unregister_exynos_dm_freq_scaler(int dm_type)
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{
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return 0;
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}
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static inline
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int policy_update_call_to_DM(int dm_type, u32 min_freq, u32 max_freq)
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{
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return 0;
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}
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static inline
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int DM_CALL(int dm_type, unsigned long *target_freq)
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{
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return 0;
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}
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static inline
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int policy_update_with_DM_CALL(int dm_type, u32 min_freq, u32 max_freq, unsigned long *target_freq)
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{
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return 0;
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}
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#endif
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#endif /* __EXYNOS_DM_H */
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