80 lines
3.3 KiB
C
Executable File
80 lines
3.3 KiB
C
Executable File
/****************************************************************************
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*
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* Copyright (c) 2017 Samsung Electronics Co., Ltd. All rights reserved
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*
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****************************************************************************/
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/****************************************************************************
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* FILE
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* asmhcp.h - ANT Shared Memory Host Controller Protocol
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*
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* DESCRIPTION
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* This file specifies the layout of the ANT Shared Memory
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* Host Controller Protocol
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*/
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#ifndef __ASMHCP_H__
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#define __ASMHCP_H__
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#define ASMHCP_TRANSFER_RING_DATA_SIZE (16)
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#define ASMHCP_TRANSFER_RING_CMD_SIZE (16)
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#define ASMHCP_BUFFER_SIZE (258)
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struct ASMHCP_TD_CONTROL {
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uint16_t length;
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uint8_t data[ASMHCP_BUFFER_SIZE];
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};
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struct ASMHCP_HEADER {
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/* AP RW - R4 RO - 64 octets */
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uint32_t magic_value; /* 0x00 */
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uint32_t mailbox_data_ctr_driv_read; /* 0x04 */
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uint32_t mailbox_data_driv_ctr_write; /* 0x08 */
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uint32_t mailbox_cmd_ctr_driv_read; /* 0x0C */
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uint32_t mailbox_cmd_driv_ctr_write; /* 0x10 */
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uint16_t ap_to_bg_int_src; /* 0x14 */
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uint16_t bg_to_ap_int_src; /* 0x16 */
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uint32_t btlog_enables0_low; /* 0x18 */
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uint32_t firmware_control; /* 0x1C */
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uint32_t btlog_enables0_high; /* 0x20 */
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uint32_t btlog_enables1_low; /* 0x24 */
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uint32_t btlog_enables1_high; /* 0x28 */
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uint8_t reserved1[0x14]; /* 0x2C */
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/* AP RO - R4 RW - 64 octets */
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uint32_t mailbox_cmd_driv_ctr_read; /* 0x40 */
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uint32_t mailbox_cmd_ctr_driv_write; /* 0x44 */
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uint32_t mailbox_data_driv_ctr_read; /* 0x48 */
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uint32_t mailbox_data_ctr_driv_write; /* 0x4C */
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uint32_t firmware_features; /* 0x50 */
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uint16_t panic_deathbed_confession; /* 0x54 */
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uint8_t reserved2[0x2A]; /* 0x56 */
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};
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struct ASMHCP_PROTOCOL {
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/* header offset: 0x00000000 */
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volatile struct ASMHCP_HEADER header;
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/* from controller */
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struct ASMHCP_TD_CONTROL /* offset: 0x00000080 */
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cmd_controller_driver_transfer_ring[ASMHCP_TRANSFER_RING_CMD_SIZE];
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struct ASMHCP_TD_CONTROL /* offset: 0x000008A0 */
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data_controller_driver_transfer_ring[ASMHCP_TRANSFER_RING_DATA_SIZE];
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/* Padding used to ensure minimum 32 octets between sections */
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uint8_t reserved[0x20]; /* offset: 0x000010C0 */
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/* from driver */
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struct ASMHCP_TD_CONTROL /* offset: 0x000010E0 */
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cmd_driver_controller_transfer_ring[ASMHCP_TRANSFER_RING_CMD_SIZE];
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struct ASMHCP_TD_CONTROL /* offset: 0x00001900 */
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data_driver_controller_transfer_ring[ASMHCP_TRANSFER_RING_DATA_SIZE];
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};
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#define ASMHCP_PROTOCOL_MAGICVALUE \
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((ASMHCP_TRANSFER_RING_DATA_SIZE | (ASMHCP_TRANSFER_RING_CMD_SIZE << 4) | \
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(offsetof(struct ASMHCP_PROTOCOL, cmd_driver_controller_transfer_ring) << 15)) ^ \
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sizeof(struct ASMHCP_PROTOCOL))
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#endif /* __ASMHCP_H__ */
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