840 lines
20 KiB
C
Executable File
840 lines
20 KiB
C
Executable File
/**
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* otg.c - DesignWare USB3 DRD Controller OTG
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*
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* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
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* Copyright (c) 2013 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Authors: Ido Shayevitz <idos@codeaurora.org>
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* Anton Tikhomirov <av.tikhomirov@samsung.com>
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* Minho Lee <minho55.lee@samsung.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 of
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* the License as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/mutex.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/pm_runtime.h>
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#include <linux/usb/samsung_usb.h>
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#include <linux/mfd/samsung/s2mps18-private.h>
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#ifdef CONFIG_EXYNOS_PD
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#include <soc/samsung/exynos-pm.h>
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#endif
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#include "core.h"
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#include "otg.h"
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#include "io.h"
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int otg_connection;
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static int dwc3_otg_statemachine(struct otg_fsm *fsm)
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{
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struct usb_otg *otg = fsm->otg;
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enum usb_otg_state prev_state = otg->state;
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int ret = 0;
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if (fsm->reset) {
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if (otg->state == OTG_STATE_A_HOST) {
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otg_drv_vbus(fsm, 0);
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otg_start_host(fsm, 0);
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} else if (otg->state == OTG_STATE_B_PERIPHERAL) {
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otg_start_gadget(fsm, 0);
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}
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otg->state = OTG_STATE_UNDEFINED;
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goto exit;
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}
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switch (otg->state) {
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case OTG_STATE_UNDEFINED:
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if (fsm->id)
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otg->state = OTG_STATE_B_IDLE;
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else
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otg->state = OTG_STATE_A_IDLE;
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break;
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case OTG_STATE_B_IDLE:
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if (!fsm->id) {
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otg->state = OTG_STATE_A_IDLE;
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} else if (fsm->b_sess_vld) {
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ret = otg_start_gadget(fsm, 1);
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if (!ret)
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otg->state = OTG_STATE_B_PERIPHERAL;
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else
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pr_err("OTG SM: cannot start gadget\n");
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}
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break;
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case OTG_STATE_B_PERIPHERAL:
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if (!fsm->id || !fsm->b_sess_vld) {
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ret = otg_start_gadget(fsm, 0);
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if (!ret)
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otg->state = OTG_STATE_B_IDLE;
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else
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pr_err("OTG SM: cannot stop gadget\n");
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}
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break;
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case OTG_STATE_A_IDLE:
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if (fsm->id) {
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otg->state = OTG_STATE_B_IDLE;
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} else {
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ret = otg_start_host(fsm, 1);
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if (!ret) {
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otg_drv_vbus(fsm, 1);
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otg->state = OTG_STATE_A_HOST;
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} else {
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pr_err("OTG SM: cannot start host\n");
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}
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}
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break;
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case OTG_STATE_A_HOST:
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if (fsm->id) {
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otg_drv_vbus(fsm, 0);
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ret = otg_start_host(fsm, 0);
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if (!ret)
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otg->state = OTG_STATE_A_IDLE;
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else
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pr_err("OTG SM: cannot stop host\n");
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}
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break;
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default:
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pr_err("OTG SM: invalid state\n");
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}
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exit:
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if (!ret)
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ret = (otg->state != prev_state);
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pr_debug("OTG SM: %s => %s\n", usb_otg_state_string(prev_state),
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(ret > 0) ? usb_otg_state_string(otg->state) : "(no change)");
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return ret;
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}
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/* -------------------------------------------------------------------------- */
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static struct dwc3_ext_otg_ops *dwc3_otg_exynos_rsw_probe(struct dwc3 *dwc)
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{
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struct dwc3_ext_otg_ops *ops;
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bool ext_otg;
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ext_otg = dwc3_exynos_rsw_available(dwc->dev->parent);
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if (!ext_otg)
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return NULL;
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/* Allocate and init otg instance */
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ops = devm_kzalloc(dwc->dev, sizeof(struct dwc3_ext_otg_ops),
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GFP_KERNEL);
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if (!ops) {
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dev_err(dwc->dev, "unable to allocate dwc3_ext_otg_ops\n");
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return NULL;
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}
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ops->setup = dwc3_exynos_rsw_setup;
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ops->exit = dwc3_exynos_rsw_exit;
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ops->start = dwc3_exynos_rsw_start;
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ops->stop = dwc3_exynos_rsw_stop;
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return ops;
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}
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static void dwc3_otg_set_host_mode(struct dwc3_otg *dotg)
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{
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struct dwc3 *dwc = dotg->dwc;
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u32 reg;
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if (dotg->regs) {
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reg = dwc3_readl(dotg->regs, DWC3_OCTL);
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reg &= ~DWC3_OTG_OCTL_PERIMODE;
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dwc3_writel(dotg->regs, DWC3_OCTL, reg);
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} else {
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dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
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}
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}
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static void dwc3_otg_set_peripheral_mode(struct dwc3_otg *dotg)
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{
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struct dwc3 *dwc = dotg->dwc;
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u32 reg;
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if (dotg->regs) {
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reg = dwc3_readl(dotg->regs, DWC3_OCTL);
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reg |= DWC3_OTG_OCTL_PERIMODE;
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dwc3_writel(dotg->regs, DWC3_OCTL, reg);
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} else {
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dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE);
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}
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}
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static void dwc3_otg_drv_vbus(struct otg_fsm *fsm, int on)
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{
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struct dwc3_otg *dotg = container_of(fsm, struct dwc3_otg, fsm);
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int ret;
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if (IS_ERR(dotg->vbus_reg)) {
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dev_err(dotg->dwc->dev, "vbus regulator is not available\n");
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return;
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}
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if (on)
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ret = regulator_enable(dotg->vbus_reg);
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else
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ret = regulator_disable(dotg->vbus_reg);
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if (ret)
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dev_err(dotg->dwc->dev, "failed to turn Vbus %s\n",
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on ? "on" : "off");
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}
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static void dwc3_otg_ldo_control(struct otg_fsm *fsm, int on)
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{
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struct usb_otg *otg = fsm->otg;
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struct dwc3_otg *dotg = container_of(otg, struct dwc3_otg, otg);
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struct device *dev = dotg->dwc->dev;
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int i, ret;
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if (dotg->ldo_num == 0)
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return;
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dev_info(dev, "Turn %s LDO\n", on ? "on" : "off");
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if (on) {
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for (i = 0; i < dotg->ldo_num; i++) {
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ret = regulator_enable(dotg->ldo_con[i]);
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if (ret)
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dev_err(dev, "failed to enable LDO[%d]!!\n", i);
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}
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} else {
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for (i = dotg->ldo_num - 1; i >= 0; i--) {
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ret = regulator_disable(dotg->ldo_con[i]);
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if (ret)
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dev_err(dev, "failed to disable LDO[%d]!!\n", i);
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}
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}
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#if defined(OLD_FASHIONED_LDO_CONTROL)
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if (on) {
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for (i = 0; i < dotg->ldos; i++)
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s2m_ldo_set_mode(dotg->ldo_num[i], 0x3);
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} else {
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for (i = 0; i < dotg->ldos; i++)
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s2m_ldo_set_mode(dotg->ldo_num[i], 0x1);
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}
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#endif
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return;
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}
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static void dwc3_pm_runtime_init(struct device *dev)
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{
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dev->power.runtime_status = RPM_SUSPENDED;
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dev->power.idle_notification = false;
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dev->power.disable_depth = 1;
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atomic_set(&dev->power.usage_count, 0);
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dev->power.runtime_error = 0;
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atomic_set(&dev->power.child_count, 0);
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pm_suspend_ignore_children(dev, false);
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dev->power.runtime_auto = true;
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dev->power.request_pending = false;
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dev->power.request = RPM_REQ_NONE;
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dev->power.deferred_resume = false;
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dev->power.accounting_timestamp = jiffies;
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dev->power.timer_expires = 0;
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init_waitqueue_head(&dev->power.wait_queue);
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}
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static int dwc3_otg_start_host(struct otg_fsm *fsm, int on)
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{
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struct usb_otg *otg = fsm->otg;
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struct dwc3_otg *dotg = container_of(otg, struct dwc3_otg, otg);
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struct dwc3 *dwc = dotg->dwc;
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struct device *dev = dotg->dwc->dev;
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int ret = 0;
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if (!dotg->dwc->xhci) {
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dev_err(dev, "%s: does not have any xhci\n", __func__);
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return -EINVAL;
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}
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dev_info(dev, "Turn %s host\n", on ? "on" : "off");
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if (on) {
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otg_connection = 1;
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dwc3_otg_ldo_control(fsm, 1);
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if (dotg->pm_qos_int_val)
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pm_qos_update_request(&dotg->pm_qos_int_req,
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dotg->pm_qos_int_val);
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pm_runtime_get_sync(dev);
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ret = dwc3_phy_setup(dwc);
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if (ret) {
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dev_err(dwc->dev, "%s: failed to setup phy\n",
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__func__);
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goto err1;
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}
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ret = dwc3_core_init(dwc);
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if (ret) {
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dev_err(dwc->dev, "%s: failed to reinitialize core\n",
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__func__);
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goto err1;
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}
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phy_conn(dwc->usb2_generic_phy, 1);
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/**
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* In case there is not a resistance to detect VBUS,
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* DP/DM controls by S/W are needed at this point.
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*/
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if (dwc->is_not_vbus_pad) {
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phy_set(dwc->usb2_generic_phy,
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SET_DPDM_PULLDOWN, NULL);
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phy_set(dwc->usb3_generic_phy,
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SET_DPDM_PULLDOWN, NULL);
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}
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dwc3_otg_set_host_mode(dotg);
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dwc3_pm_runtime_init(&dwc->xhci->dev);
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ret = platform_device_add(dwc->xhci);
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if (ret) {
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dev_err(dev, "%s: cannot add xhci\n", __func__);
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goto err2;
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}
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} else {
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otg_connection = 0;
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platform_device_del(dwc->xhci);
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err2:
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phy_conn(dwc->usb2_generic_phy, 0);
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dwc3_core_exit(dwc);
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err1:
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pm_runtime_put_sync(dev);
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if (dotg->pm_qos_int_val)
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pm_qos_update_request(&dotg->pm_qos_int_req, 0);
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dwc3_otg_ldo_control(fsm, 0);
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}
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return ret;
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}
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static int dwc3_otg_start_gadget(struct otg_fsm *fsm, int on)
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{
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struct usb_otg *otg = fsm->otg;
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struct dwc3_otg *dotg = container_of(otg, struct dwc3_otg, otg);
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struct dwc3 *dwc = dotg->dwc;
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struct device *dev = dotg->dwc->dev;
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int ret = 0;
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if (!otg->gadget) {
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dev_err(dev, "%s does not have any gadget\n", __func__);
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return -EINVAL;
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}
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dev_info(dev, "Turn %s gadget %s\n",
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on ? "on" : "off", otg->gadget->name);
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if (on) {
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wake_lock(&dotg->wakelock);
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dwc3_otg_ldo_control(fsm, 1);
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if (dotg->pm_qos_int_val)
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pm_qos_update_request(&dotg->pm_qos_int_req,
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dotg->pm_qos_int_val);
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ret = pm_runtime_get_sync(dev);
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dev_info(dev, "%s pm_runtime_get_sync = %d\n",
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__func__, ret);
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ret = dwc3_phy_setup(dwc);
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if (ret) {
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dev_err(dwc->dev, "%s: failed to setup phy\n",
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__func__);
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goto err1;
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}
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ret = dwc3_core_init(dwc);
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if (ret) {
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dev_err(dwc->dev, "%s: failed to reinitialize core\n",
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__func__);
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goto err1;
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}
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dwc3_otg_set_peripheral_mode(dotg);
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ret = usb_gadget_vbus_connect(otg->gadget);
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if (ret) {
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dev_err(dwc->dev, "%s: vbus connect failed\n",
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__func__);
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goto err2;
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}
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} else {
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if (dwc->is_not_vbus_pad)
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dwc3_gadget_disconnect_proc(dwc);
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/* avoid missing disconnect interrupt */
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ret = wait_for_completion_timeout(&dwc->disconnect,
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msecs_to_jiffies(200));
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if (!ret) {
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dev_err(dwc->dev, "%s: disconnect completion timeout\n",
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__func__);
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return ret;
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}
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ret = usb_gadget_vbus_disconnect(otg->gadget);
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if (ret)
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dev_err(dwc->dev, "%s: vbus disconnect failed\n",
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__func__);
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err2:
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dwc3_core_exit(dwc);
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err1:
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pm_runtime_put_sync(dev);
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if (dotg->pm_qos_int_val)
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pm_qos_update_request(&dotg->pm_qos_int_req, 0);
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dwc3_otg_ldo_control(fsm, 0);
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wake_unlock(&dotg->wakelock);
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dwc->usb2_generic_phy->init_count = 0;
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dwc->usb3_generic_phy->init_count = 0;
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}
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return ret;
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}
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static struct otg_fsm_ops dwc3_otg_fsm_ops = {
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.drv_vbus = dwc3_otg_drv_vbus,
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.start_host = dwc3_otg_start_host,
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.start_gadget = dwc3_otg_start_gadget,
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};
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/* -------------------------------------------------------------------------- */
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void dwc3_otg_run_sm(struct otg_fsm *fsm)
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{
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struct dwc3_otg *dotg = container_of(fsm, struct dwc3_otg, fsm);
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int state_changed;
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/* Prevent running SM on early system resume */
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if (!dotg->ready)
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return;
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mutex_lock(&fsm->lock);
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do {
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state_changed = dwc3_otg_statemachine(fsm);
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} while (state_changed > 0);
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mutex_unlock(&fsm->lock);
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}
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/* Bind/Unbind the peripheral controller driver */
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static int dwc3_otg_set_peripheral(struct usb_otg *otg,
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struct usb_gadget *gadget)
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{
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struct dwc3_otg *dotg = container_of(otg, struct dwc3_otg, otg);
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struct otg_fsm *fsm = &dotg->fsm;
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struct device *dev = dotg->dwc->dev;
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if (gadget) {
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dev_info(dev, "Binding gadget %s\n", gadget->name);
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otg->gadget = gadget;
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} else {
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dev_info(dev, "Unbinding gadget\n");
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mutex_lock(&fsm->lock);
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if (otg->state == OTG_STATE_B_PERIPHERAL) {
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/* Reset OTG Statemachine */
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fsm->reset = 1;
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dwc3_otg_statemachine(fsm);
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fsm->reset = 0;
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}
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otg->gadget = NULL;
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mutex_unlock(&fsm->lock);
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dwc3_otg_run_sm(fsm);
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}
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return 0;
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}
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static int dwc3_otg_get_id_state(struct dwc3_otg *dotg)
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{
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u32 reg = dwc3_readl(dotg->regs, DWC3_OSTS);
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return !!(reg & DWC3_OTG_OSTS_CONIDSTS);
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}
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static int dwc3_otg_get_b_sess_state(struct dwc3_otg *dotg)
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{
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u32 reg = dwc3_readl(dotg->regs, DWC3_OSTS);
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return !!(reg & DWC3_OTG_OSTS_BSESVALID);
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}
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static irqreturn_t dwc3_otg_interrupt(int irq, void *_dotg)
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{
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struct dwc3_otg *dotg = (struct dwc3_otg *)_dotg;
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struct otg_fsm *fsm = &dotg->fsm;
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u32 oevt, handled_events = 0;
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irqreturn_t ret = IRQ_NONE;
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oevt = dwc3_readl(dotg->regs, DWC3_OEVT);
|
|
|
|
/* ID */
|
|
if (oevt & DWC3_OEVTEN_OTGCONIDSTSCHNGEVNT) {
|
|
fsm->id = dwc3_otg_get_id_state(dotg);
|
|
handled_events |= DWC3_OEVTEN_OTGCONIDSTSCHNGEVNT;
|
|
}
|
|
|
|
/* VBus */
|
|
if (oevt & DWC3_OEVTEN_OTGBDEVVBUSCHNGEVNT) {
|
|
fsm->b_sess_vld = dwc3_otg_get_b_sess_state(dotg);
|
|
handled_events |= DWC3_OEVTEN_OTGBDEVVBUSCHNGEVNT;
|
|
}
|
|
|
|
if (handled_events) {
|
|
dwc3_writel(dotg->regs, DWC3_OEVT, handled_events);
|
|
ret = IRQ_WAKE_THREAD;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static irqreturn_t dwc3_otg_thread_interrupt(int irq, void *_dotg)
|
|
{
|
|
struct dwc3_otg *dotg = (struct dwc3_otg *)_dotg;
|
|
|
|
dwc3_otg_run_sm(&dotg->fsm);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static void dwc3_otg_enable_irq(struct dwc3_otg *dotg)
|
|
{
|
|
/* Enable only connector ID status & VBUS change events */
|
|
dwc3_writel(dotg->regs, DWC3_OEVTEN,
|
|
DWC3_OEVTEN_OTGCONIDSTSCHNGEVNT |
|
|
DWC3_OEVTEN_OTGBDEVVBUSCHNGEVNT);
|
|
}
|
|
|
|
static void dwc3_otg_disable_irq(struct dwc3_otg *dotg)
|
|
{
|
|
dwc3_writel(dotg->regs, DWC3_OEVTEN, 0x0);
|
|
}
|
|
|
|
static void dwc3_otg_reset(struct dwc3_otg *dotg)
|
|
{
|
|
/*
|
|
* OCFG[2] - OTG-Version = 0
|
|
* OCFG[1] - HNPCap = 0
|
|
* OCFG[0] - SRPCap = 0
|
|
*/
|
|
dwc3_writel(dotg->regs, DWC3_OCFG, 0x0);
|
|
|
|
/*
|
|
* OCTL[6] - PeriMode = 1
|
|
* OCTL[5] - PrtPwrCtl = 0
|
|
* OCTL[4] - HNPReq = 0
|
|
* OCTL[3] - SesReq = 0
|
|
* OCTL[2] - TermSelDLPulse = 0
|
|
* OCTL[1] - DevSetHNPEn = 0
|
|
* OCTL[0] - HstSetHNPEn = 0
|
|
*/
|
|
dwc3_writel(dotg->regs, DWC3_OCTL, DWC3_OTG_OCTL_PERIMODE);
|
|
|
|
/* Clear all otg events (interrupts) indications */
|
|
dwc3_writel(dotg->regs, DWC3_OEVT, DWC3_OEVT_CLEAR_ALL);
|
|
}
|
|
|
|
/* -------------------------------------------------------------------------- */
|
|
|
|
static ssize_t
|
|
dwc3_otg_show_state(struct device *dev,
|
|
struct device_attribute *attr, char *buf)
|
|
{
|
|
struct dwc3 *dwc = dev_get_drvdata(dev);
|
|
struct usb_otg *otg = &dwc->dotg->otg;
|
|
|
|
return snprintf(buf, PAGE_SIZE, "%s\n",
|
|
usb_otg_state_string(otg->state));
|
|
}
|
|
|
|
static DEVICE_ATTR(state, S_IRUSR | S_IRGRP,
|
|
dwc3_otg_show_state, NULL);
|
|
|
|
static ssize_t
|
|
dwc3_otg_show_b_sess(struct device *dev,
|
|
struct device_attribute *attr, char *buf)
|
|
{
|
|
struct dwc3 *dwc = dev_get_drvdata(dev);
|
|
struct otg_fsm *fsm = &dwc->dotg->fsm;
|
|
|
|
return snprintf(buf, PAGE_SIZE, "%d\n", fsm->b_sess_vld);
|
|
}
|
|
|
|
static ssize_t
|
|
dwc3_otg_store_b_sess(struct device *dev,
|
|
struct device_attribute *attr, const char *buf, size_t n)
|
|
{
|
|
struct dwc3 *dwc = dev_get_drvdata(dev);
|
|
struct otg_fsm *fsm = &dwc->dotg->fsm;
|
|
int b_sess_vld;
|
|
|
|
if (sscanf(buf, "%d", &b_sess_vld) != 1)
|
|
return -EINVAL;
|
|
|
|
fsm->b_sess_vld = !!b_sess_vld;
|
|
|
|
dwc3_otg_run_sm(fsm);
|
|
|
|
return n;
|
|
}
|
|
|
|
static DEVICE_ATTR(b_sess, S_IWUSR | S_IRUSR | S_IRGRP,
|
|
dwc3_otg_show_b_sess, dwc3_otg_store_b_sess);
|
|
|
|
static ssize_t
|
|
dwc3_otg_show_id(struct device *dev,
|
|
struct device_attribute *attr, char *buf)
|
|
{
|
|
struct dwc3 *dwc = dev_get_drvdata(dev);
|
|
struct otg_fsm *fsm = &dwc->dotg->fsm;
|
|
|
|
return snprintf(buf, PAGE_SIZE, "%d\n", fsm->id);
|
|
}
|
|
|
|
static ssize_t
|
|
dwc3_otg_store_id(struct device *dev,
|
|
struct device_attribute *attr, const char *buf, size_t n)
|
|
{
|
|
struct dwc3 *dwc = dev_get_drvdata(dev);
|
|
struct otg_fsm *fsm = &dwc->dotg->fsm;
|
|
int id;
|
|
|
|
if (sscanf(buf, "%d", &id) != 1)
|
|
return -EINVAL;
|
|
|
|
fsm->id = !!id;
|
|
|
|
dwc3_otg_run_sm(fsm);
|
|
|
|
return n;
|
|
}
|
|
|
|
static DEVICE_ATTR(id, S_IWUSR | S_IRUSR | S_IRGRP,
|
|
dwc3_otg_show_id, dwc3_otg_store_id);
|
|
|
|
static struct attribute *dwc3_otg_attributes[] = {
|
|
&dev_attr_id.attr,
|
|
&dev_attr_b_sess.attr,
|
|
&dev_attr_state.attr,
|
|
NULL
|
|
};
|
|
|
|
static const struct attribute_group dwc3_otg_attr_group = {
|
|
.attrs = dwc3_otg_attributes,
|
|
};
|
|
|
|
/**
|
|
* dwc3_otg_start
|
|
* @dwc: pointer to our controller context structure
|
|
*/
|
|
int dwc3_otg_start(struct dwc3 *dwc)
|
|
{
|
|
struct dwc3_otg *dotg = dwc->dotg;
|
|
struct otg_fsm *fsm = &dotg->fsm;
|
|
int ret;
|
|
|
|
if (dotg->ext_otg_ops) {
|
|
ret = dwc3_ext_otg_start(dotg);
|
|
if (ret) {
|
|
dev_err(dwc->dev, "failed to start external OTG\n");
|
|
return ret;
|
|
}
|
|
} else {
|
|
dotg->regs = dwc->regs;
|
|
|
|
dwc3_otg_reset(dotg);
|
|
|
|
dotg->fsm.id = dwc3_otg_get_id_state(dotg);
|
|
dotg->fsm.b_sess_vld = dwc3_otg_get_b_sess_state(dotg);
|
|
|
|
dotg->irq = platform_get_irq(to_platform_device(dwc->dev), 0);
|
|
ret = devm_request_threaded_irq(dwc->dev, dotg->irq,
|
|
dwc3_otg_interrupt,
|
|
dwc3_otg_thread_interrupt,
|
|
IRQF_SHARED, "dwc3-otg", dotg);
|
|
if (ret) {
|
|
dev_err(dwc->dev, "failed to request irq #%d --> %d\n",
|
|
dotg->irq, ret);
|
|
return ret;
|
|
}
|
|
|
|
dwc3_otg_enable_irq(dotg);
|
|
}
|
|
|
|
dotg->ready = 1;
|
|
|
|
dwc3_otg_run_sm(fsm);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* dwc3_otg_stop
|
|
* @dwc: pointer to our controller context structure
|
|
*/
|
|
void dwc3_otg_stop(struct dwc3 *dwc)
|
|
{
|
|
struct dwc3_otg *dotg = dwc->dotg;
|
|
|
|
if (dotg->ext_otg_ops) {
|
|
dwc3_ext_otg_stop(dotg);
|
|
} else {
|
|
dwc3_otg_disable_irq(dotg);
|
|
free_irq(dotg->irq, dotg);
|
|
}
|
|
|
|
dotg->ready = 0;
|
|
}
|
|
|
|
/* -------------------------------------------------------------------------- */
|
|
bool otg_is_connect(void)
|
|
{
|
|
if (otg_connection)
|
|
return true;
|
|
else
|
|
return false;
|
|
}
|
|
EXPORT_SYMBOL_GPL(otg_is_connect);
|
|
|
|
int dwc3_otg_init(struct dwc3 *dwc)
|
|
{
|
|
struct dwc3_otg *dotg;
|
|
struct dwc3_ext_otg_ops *ops = NULL;
|
|
int ret = 0, i;
|
|
const char *regulator_name;
|
|
|
|
dev_info(dwc->dev, "%s\n", __func__);
|
|
|
|
/* EXYNOS SoCs don't have HW OTG, but support SW OTG. */
|
|
ops = dwc3_otg_exynos_rsw_probe(dwc);
|
|
if (!ops)
|
|
return 0;
|
|
|
|
/* Allocate and init otg instance */
|
|
dotg = devm_kzalloc(dwc->dev, sizeof(struct dwc3_otg), GFP_KERNEL);
|
|
if (!dotg) {
|
|
dev_err(dwc->dev, "unable to allocate dwc3_otg\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
/* This reference is used by dwc3 modules for checking otg existance */
|
|
dwc->dotg = dotg;
|
|
dotg->dwc = dwc;
|
|
|
|
dotg->ldo_num = of_property_count_strings(dwc->dev->of_node, "ldo-names");
|
|
if (dotg->ldo_num <= 0) {
|
|
dev_info(dwc->dev, "LDO control is not supported!!\n");
|
|
} else if (dotg->ldo_num > DWC3_OTG_MAX_LDOS) {
|
|
dev_err(dwc->dev, "Too many LDOs are defined - %d(MAX %d)!!\n",
|
|
dotg->ldo_num, DWC3_OTG_MAX_LDOS);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
for (i = 0; i < dotg->ldo_num; i++) {
|
|
of_property_read_string_index(dwc->dev->of_node,
|
|
"ldo-names", i, ®ulator_name);
|
|
dev_info(dwc->dev, "ldo-names[%d] : %s\n", i, regulator_name);
|
|
dotg->ldo_con[i] = regulator_get(dwc->dev->parent, regulator_name);
|
|
if (IS_ERR(dotg->ldo_con[i]))
|
|
dev_err(dwc->dev, "failed to obtain regulator[%d]\n", i);
|
|
}
|
|
|
|
#if defined(OLD_FASHIONED_LDO_CONTROL)
|
|
ret = of_property_read_u32(dwc->dev->of_node,"ldos", &dotg->ldos);
|
|
if (ret < 0) {
|
|
dev_err(dwc->dev, "can't get ldo information\n");
|
|
return -EINVAL;
|
|
} else {
|
|
if (dotg->ldos) {
|
|
dev_info(dwc->dev, "have %d LDOs for supporting USB L2 suspend \n", dotg->ldos);
|
|
dotg->ldo_num = (int *)devm_kmalloc(dwc->dev, sizeof(int) * (dotg->ldos),
|
|
GFP_KERNEL);
|
|
ret = of_property_read_u32_array(dwc->dev->of_node,
|
|
"ldo_number", dotg->ldo_num, dotg->ldos);
|
|
} else {
|
|
dev_info(dwc->dev, "don't have LDOs for supporting USB L2 suspend \n");
|
|
}
|
|
}
|
|
#endif
|
|
|
|
ret = of_property_read_u32(dwc->dev->of_node,
|
|
"usb-pm-qos-int", &dotg->pm_qos_int_val);
|
|
if (ret < 0) {
|
|
dev_err(dwc->dev, "couldn't read usb-pm-qos-int %s node, error = %d\n",
|
|
dwc->dev->of_node->name, ret);
|
|
dotg->pm_qos_int_val = 0;
|
|
} else {
|
|
pm_qos_add_request(&dotg->pm_qos_int_req,
|
|
PM_QOS_DEVICE_THROUGHPUT, 0);
|
|
}
|
|
|
|
dotg->ext_otg_ops = ops;
|
|
|
|
dotg->otg.set_peripheral = dwc3_otg_set_peripheral;
|
|
dotg->otg.set_host = NULL;
|
|
|
|
dotg->otg.state = OTG_STATE_UNDEFINED;
|
|
|
|
mutex_init(&dotg->fsm.lock);
|
|
dotg->fsm.ops = &dwc3_otg_fsm_ops;
|
|
dotg->fsm.otg = &dotg->otg;
|
|
|
|
dotg->vbus_reg = devm_regulator_get(dwc->dev->parent, "dwc3-vbus");
|
|
if (IS_ERR(dotg->vbus_reg))
|
|
dev_err(dwc->dev, "failed to obtain vbus regulator\n");
|
|
|
|
if (dotg->ext_otg_ops) {
|
|
ret = dwc3_ext_otg_setup(dotg);
|
|
if (ret) {
|
|
dev_err(dwc->dev, "failed to setup OTG\n");
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
wake_lock_init(&dotg->wakelock, WAKE_LOCK_SUSPEND, "dwc3-otg");
|
|
|
|
ret = sysfs_create_group(&dwc->dev->kobj, &dwc3_otg_attr_group);
|
|
if (ret)
|
|
dev_err(dwc->dev, "failed to create dwc3 otg attributes\n");
|
|
|
|
#ifdef CONFIG_SOC_EXYNOS9810
|
|
register_usb_is_connect(NULL);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
void dwc3_otg_exit(struct dwc3 *dwc)
|
|
{
|
|
struct dwc3_otg *dotg = dwc->dotg;
|
|
|
|
if (!dotg->ext_otg_ops)
|
|
return;
|
|
|
|
dwc3_ext_otg_exit(dotg);
|
|
|
|
sysfs_remove_group(&dwc->dev->kobj, &dwc3_otg_attr_group);
|
|
wake_lock_destroy(&dotg->wakelock);
|
|
free_irq(dotg->irq, dotg);
|
|
dotg->otg.state = OTG_STATE_UNDEFINED;
|
|
kfree(dotg);
|
|
dwc->dotg = NULL;
|
|
}
|