168 lines
3.6 KiB
C
Executable File
168 lines
3.6 KiB
C
Executable File
#include "../pmucal_common.h"
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#include "../pmucal_cpu.h"
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#include "../pmucal_local.h"
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#include "../pmucal_rae.h"
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#include "../pmucal_system.h"
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#include "../pmucal_powermode.h"
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#include "flexpmu_cal_cpu_exynos9810.h"
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#include "flexpmu_cal_local_exynos9810.h"
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#include "flexpmu_cal_p2vmap_exynos9810.h"
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#include "flexpmu_cal_system_exynos9810.h"
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#include "flexpmu_cal_powermode_exynos9810.h"
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#include "flexpmu_cal_define_exynos9810.h"
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#include "../pmucal_cp.h"
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#include "pmucal_cp_exynos9810.h"
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#include "cmucal-node.c"
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#include "cmucal-qch.c"
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#include "cmucal-sfr.c"
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#include "cmucal-vclk.c"
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#include "cmucal-vclklut.c"
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#include "clkout_exynos9810.c"
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#include "acpm_dvfs_exynos9810.h"
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#include "asv_exynos9810.h"
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#include "../ra.h"
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void __iomem *cmu_base;
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#define PLL_CON0_PLL_MMC (0x100)
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#define PLL_CON1_PLL_MMC (0x104)
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#define PLL_CON2_PLL_MMC (0x108)
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#define PLL_CON3_PLL_MMC (0x10c)
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#define PLL_ENABLE_SHIFT (31)
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#define MANUAL_MODE (0x2)
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#define MFR_MASK (0xff)
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#define MRR_MASK (0x3f)
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#define MFR_SHIFT (16)
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#define MRR_SHIFT (24)
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#define SSCG_EN (16)
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static int cmu_stable_done(void __iomem *cmu,
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unsigned char shift,
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unsigned int done,
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int usec)
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{
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unsigned int result;
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do {
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result = get_bit(cmu, shift);
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if (result == done)
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return 0;
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udelay(1);
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} while (--usec > 0);
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return -EVCLKTIMEOUT;
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}
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int pll_mmc_enable(int enable)
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{
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unsigned int reg;
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unsigned int cmu_mode;
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int ret;
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if (!cmu_base) {
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pr_err("%s: cmu_base cmuioremap failed\n", __func__);
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return -1;
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}
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cmu_mode = readl(cmu_base + PLL_CON2_PLL_MMC);
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writel(MANUAL_MODE, cmu_base + PLL_CON2_PLL_MMC);
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reg = readl(cmu_base + PLL_CON0_PLL_MMC);
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if (!enable) {
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reg &= ~(PLL_MUX_SEL);
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writel(reg, cmu_base + PLL_CON0_PLL_MMC);
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ret = cmu_stable_done(cmu_base + PLL_CON0_PLL_MMC, PLL_MUX_BUSY_SHIFT, 0, 100);
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if (ret)
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pr_err("pll mux change time out, \'PLL_MMC\'\n");
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}
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if (enable)
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reg |= 1 << PLL_ENABLE_SHIFT;
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else
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reg &= ~(1 << PLL_ENABLE_SHIFT);
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writel(reg, cmu_base + PLL_CON0_PLL_MMC);
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if (enable) {
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ret = cmu_stable_done(cmu_base + PLL_CON0_PLL_MMC, PLL_STABLE_SHIFT, 1, 100);
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if (ret)
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pr_err("pll time out, \'PLL_MMC\' %d\n", enable);
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reg |= PLL_MUX_SEL;
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writel(reg, cmu_base + PLL_CON0_PLL_MMC);
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ret = cmu_stable_done(cmu_base + PLL_CON0_PLL_MMC, PLL_MUX_BUSY_SHIFT, 0, 100);
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if (ret)
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pr_err("pll mux change time out, \'PLL_MMC\'\n");
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}
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writel(cmu_mode, cmu_base + PLL_CON2_PLL_MMC);
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return ret;
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}
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int cal_pll_mmc_set_ssc(unsigned int mfr, unsigned int mrr, unsigned int ssc_on)
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{
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unsigned int reg;
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int ret = 0;
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ret = pll_mmc_enable(0);
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if (ret) {
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pr_err("%s: pll_mmc_disable failed\n", __func__);
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return ret;
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}
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reg = readl(cmu_base + PLL_CON3_PLL_MMC);
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reg &= ~((MFR_MASK << MFR_SHIFT) | (MRR_MASK << MRR_SHIFT));
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if (ssc_on)
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reg |= ((mfr & MFR_MASK) << MFR_SHIFT) | ((mrr & MRR_MASK) << MRR_SHIFT);
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writel(reg, cmu_base + PLL_CON3_PLL_MMC);
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reg = readl(cmu_base + PLL_CON1_PLL_MMC);
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if (ssc_on)
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reg |= 1 << SSCG_EN;
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else
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reg &= ~(1 << SSCG_EN);
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writel(reg, cmu_base + PLL_CON1_PLL_MMC);
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ret = pll_mmc_enable(1);
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if (ret)
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pr_err("%s: pll_mmc_enable failed\n", __func__);
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return ret;
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}
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void exynos9810_cal_data_init(void)
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{
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pr_info("%s: cal data init\n", __func__);
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/* cpu inform sfr initialize */
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pmucal_sys_powermode[SYS_SICD] = CPU_INFORM_SICD;
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pmucal_sys_powermode[SYS_SLEEP] = CPU_INFORM_SLEEP;
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pmucal_sys_powermode[SYS_SLEEP_USBL2] = CPU_INFORM_SLEEP_USBL2;
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cpu_inform_c2 = CPU_INFORM_C2;
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cpu_inform_cpd = CPU_INFORM_CPD;
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cmu_base = ioremap(0x1a240000, SZ_4K);
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if (!cmu_base)
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pr_err("%s: cmu_base cmuioremap failed\n", __func__);
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}
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void (*cal_data_init)(void) = exynos9810_cal_data_init;
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