601 lines
14 KiB
C
Executable File
601 lines
14 KiB
C
Executable File
#ifndef __CMUCAL_H__
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#define __CMUCAL_H__
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include "vclk.h"
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struct dentry;
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#ifndef abs
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#define abs(x) ({ \
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long ret; \
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if (sizeof(x) == sizeof(long)) { \
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long __x = (x); \
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ret = (__x < 0) ? -__x : __x; \
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} else { \
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int __x = (x); \
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ret = (__x < 0) ? -__x : __x; \
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} \
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ret; \
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})
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#endif
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#ifndef do_div
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#define do_div(a, b) (a /= b)
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#endif
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#define EVCLKPERM 1
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#define EVCLKNOENT 2
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#define EVCLKAGAIN 11
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#define EVCLKNOMEM 12
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#define EVCLKFAULT 14 /* Bad address */
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#define EVCLKBUSY 16
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#define EVCLKINVAL 22
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#define EVCLKTIMEOUT 110
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#define MASK_OF_TYPE 0x0F000000
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#define MASK_OF_SUBTYPE 0x00FF0000
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#define MASK_OF_ID 0x0000FFFF
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#define FIXED_RATE_TYPE 0x01000000
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#define FIXED_FACTOR_TYPE 0x02000000
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#define PLL_TYPE 0x03000000
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#define MUX_TYPE 0x04000000
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#define USER_MUX_TYPE 0x04010000
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#define CONST_MUX_TYPE 0x04020000
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#define DIV_TYPE 0x05000000
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#define CONST_DIV_TYPE 0x05020000
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#define GATE_TYPE 0x06000000
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#define GATE_ROOT_TYPE 0x06010000
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#define QCH_TYPE 0x07000000
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#define SFR_BLOCK_TYPE 0x08000000
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#define SFR_TYPE 0x09000000
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#define SFR_ACCESS_TYPE 0x0A000000
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#define VCLK_TYPE 0x0B000000
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#define COMMON_VCLK_TYPE 0x0B010000
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#define DFS_VCLK_TYPE 0x0B020000
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#define GATE_VCLK_TYPE 0x0B030000
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#define ACPM_VCLK_TYPE 0x0B040000
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#define OPTION_TYPE 0x0C000000
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#define CLKOUT_TYPE 0x0D000000
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#define INVALID_CLK_ID MASK_OF_ID
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#define EMPTY_CLK_ID MASK_OF_ID
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#define EMPTY_CAL_ID MASK_OF_ID
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/**
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* struct vclk_lut - Virtual clock Look-Up-Table
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* @rate: virtual clock rate
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* @params: clks setting parameters, number of params is num_clks
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*/
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struct vclk_lut {
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unsigned int rate;
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unsigned int *params;
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};
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/**
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* struct vclk_seq - Virtual clock sequence
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* @idx: index of struct vclk_clks
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* @opt: option : TRANS_HIGH, TRANS_LOW, TRANS_FORCE
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*/
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struct vclk_seq {
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unsigned int idx;
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unsigned int opt;
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};
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/**
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* struct vclk_switch - switching lut info
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* @switch_rate: switch_rate
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* @mux_value: mux value about source
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* @div_value: div value about mout
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*/
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struct switch_lut {
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unsigned int rate;
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unsigned int mux_value;
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unsigned int div_value;
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};
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/**
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* struct vclk_switch - Virtual clock switching PLL info
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* @switch_mux: switching MUX id
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* @src_mux: switching PLL source MUX id
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* @src_div: switching PLL source Divider id
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* @lut: switch PLL Look-Up-Table pointer
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*/
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struct vclk_switch {
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unsigned int switch_mux;
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unsigned int src_mux;
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unsigned int src_div;
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unsigned int src_gate;
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unsigned int src_umux;
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struct switch_lut *lut;
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unsigned int num_switches;
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};
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/**
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* struct vclk - Virtual clock
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* @id: vclk id
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* @name: vclk name
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* @vrate: vclk virtual clock frequency
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* @lut: Look-Up-Table pointer
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* @seq: clock setting sequnce pointer
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* @clk_list: clock list pointer
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* @num_rates: number of lut rates
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* @num_clks: number of clks and seq
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*/
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struct vclk {
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unsigned int id;
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char *name;
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unsigned int vrate;
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struct vclk_lut *lut;
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unsigned int *list;
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struct vclk_seq *seq;
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unsigned int num_rates;
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unsigned int num_list;
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unsigned int max_freq;
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unsigned int min_freq;
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unsigned int boot_freq;
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unsigned int resume_freq;
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int margin_id;
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struct vclk_switch *switch_info;
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struct vclk_trans_ops *ops;
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#ifdef CONFIG_DEBUG_FS
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struct dentry *dentry;
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#endif
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};
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enum clk_pll_type {
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PLL_1416X = 14160,
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PLL_1417X = 14170,
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PLL_1418X = 14180,
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PLL_1419X = 14190,
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PLL_1431X = 14310,
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PLL_1450X = 14500,
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PLL_1451X = 14510,
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PLL_1452X = 14520,
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PLL_1460X = 14600,
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PLL_1050X = 10500,
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PLL_1051X = 10510,
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PLL_1052X = 10520,
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PLL_1054X = 10540,
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PLL_1061X = 10610,
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PLL_1016X = 10160,
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PLL_1017X = 10170,
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PLL_1018X = 10180,
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PLL_1019X = 10190,
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PLL_1031X = 10310,
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};
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enum margin_id {
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MARGIN_MIF,
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MARGIN_INT,
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MARGIN_BIG,
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MARGIN_LIT,
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MARGIN_G3D,
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MARGIN_INTCAM,
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MARGIN_CAM,
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MARGIN_DISP,
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MARGIN_G3DM,
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MARGIN_CP,
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MARGIN_FSYS0,
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MARGIN_AUD,
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MARGIN_IVA,
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MARGIN_SCORE,
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MAX_MARGIN_ID,
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};
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#define IS_FIXED_RATE(_id) ((_id & MASK_OF_TYPE) == FIXED_RATE_TYPE)
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#define IS_FIXED_FACTOR(_id) ((_id & MASK_OF_TYPE) == FIXED_FACTOR_TYPE)
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#define IS_PLL(_id) ((_id & MASK_OF_TYPE) == PLL_TYPE)
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#define IS_MUX(_id) ((_id & MASK_OF_TYPE) == MUX_TYPE)
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#define IS_USER_MUX(_id) ((_id & (MASK_OF_TYPE | MASK_OF_SUBTYPE)) == USER_MUX_TYPE)
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#define IS_CONST_MUX(_id) ((_id & (MASK_OF_TYPE | MASK_OF_SUBTYPE)) == CONST_MUX_TYPE)
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#define IS_DIV(_id) ((_id & MASK_OF_TYPE) == DIV_TYPE)
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#define IS_CONST_DIV(_id) ((_id & MASK_OF_TYPE | MASK_OF_SUBTYPE) == CONST_DIV_TYPE)
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#define IS_GATE(_id) ((_id & MASK_OF_TYPE) == GATE_TYPE)
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#define IS_QCH(_id) ((_id & MASK_OF_TYPE) == QCH_TYPE)
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#define IS_OPTION(_id) ((_id & MASK_OF_TYPE) == OPTION_TYPE)
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#define IS_VCLK(_id) ((_id & MASK_OF_TYPE) == VCLK_TYPE)
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#define IS_DFS_VCLK(_id) ((_id & (MASK_OF_TYPE | MASK_OF_SUBTYPE)) == DFS_VCLK_TYPE)
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#define IS_COMMON_VCLK(_id) ((_id & (MASK_OF_TYPE | MASK_OF_SUBTYPE)) == COMMON_VCLK_TYPE)
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#define IS_GATE_VCLK(_id) ((_id & (MASK_OF_TYPE | MASK_OF_SUBTYPE)) == GATE_VCLK_TYPE)
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#define IS_ACPM_VCLK(_id) ((_id & (MASK_OF_TYPE | MASK_OF_SUBTYPE)) == ACPM_VCLK_TYPE)
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#define GET_TYPE(_id) (_id & MASK_OF_TYPE)
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#define GET_IDX(_id) (_id & MASK_OF_ID)
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/*
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* struct sfr_block - SFR block
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* @id: id of sfr_block
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* @name: name of sfr_block
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* @pa: physical address
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* @va: virtual address
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* @size: sfr block size, 2 ^ n
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*/
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struct sfr_block {
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unsigned int id;
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char *name;
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phys_addr_t pa;
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void __iomem *va;
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unsigned int size;
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};
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/*
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* struct sfr - SFR
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* @id: id of sfr
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* @name: sfr name
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* @offset: offset from block
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* @block: index of block
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*/
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struct sfr {
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unsigned int id;
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char *name;
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unsigned int offset;
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unsigned int block;
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};
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/*
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* struct sfr_access - SFR field
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* @id: id of sfr
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* @name: sfr field name
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* @shift: shift value of field
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* @width: width value of field
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* @sfr: index of sfr
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*/
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struct sfr_access {
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unsigned int id;
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char *name;
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unsigned char shift;
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unsigned char width;
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unsigned int sfr;
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};
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/*
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* struct cmucal_clk - CMUCAL Clock node
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* @id: id of clock node
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* @paddr: physical addr of clock node
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* @pid: parent id of clock node
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* @name: name of clock node
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* @offset_idx: index of offset
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* @status_idx: index of status
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* @enable_idx: index of enable
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* @offset: offset address
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* @status: status address, or lock_offset of pll
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* @enable: enable address
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* @shift: shift of offset
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* @width: width of offset
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* @s_shift: shift of status
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* @s_width: width of status
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* @e_shift: shift of enable
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* @e_width: width of enable
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*/
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struct cmucal_clk {
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unsigned int id;
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unsigned int paddr;
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unsigned int pid;
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char *name;
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union {
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void __iomem *offset;
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void __iomem *lock;
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unsigned long offset_idx;
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};
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union {
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void __iomem *enable;
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void __iomem *pll_con0;
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unsigned long enable_idx;
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};
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union {
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void __iomem *status;
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void __iomem *pll_con1;
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unsigned long status_idx;
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};
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unsigned char shift;
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unsigned char width;
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unsigned char s_shift;
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unsigned char s_width;
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unsigned char e_shift;
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unsigned char e_width;
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};
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/*
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* struct pll_spec
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* @p,m,s,k min/max value
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* @fref, fvco, fout min/max value
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*/
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struct pll_spec {
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unsigned int pdiv_min;
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unsigned int pdiv_max;
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unsigned int mdiv_min;
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unsigned int mdiv_max;
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unsigned int sdiv_min;
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unsigned int sdiv_max;
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signed short kdiv_min;
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signed short kdiv_max;
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unsigned long long fref_min;
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unsigned long long fref_max;
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unsigned long long fvco_min;
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unsigned long long fvco_max;
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unsigned long long fout_min;
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unsigned long long fout_max;
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unsigned int lock_time;
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unsigned int flock_time;
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};
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/*
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* struct cmucal_pll_table
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* @rate: pll rate
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* @pdiv, @mdiv, @sdiv, @kdiv: for rate
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*/
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struct cmucal_pll_table {
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unsigned int rate;
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unsigned short pdiv;
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unsigned short mdiv;
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unsigned short sdiv;
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signed short kdiv;
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};
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/*
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* struct cmucal_pll
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* @clk: cmucal_rate structure
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* @type: pll type
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* @rate_table: rate table
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* @rate_count: number of rate_table
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* @lock_time: integer PLL locktime
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* @flock_time: fractional PLL locktime
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*/
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struct cmucal_pll {
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struct cmucal_clk clk;
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unsigned int umux;
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unsigned int type;
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struct cmucal_pll_table *rate_table;
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unsigned int rate_count;
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unsigned int lock_time;
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unsigned int flock_time;
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unsigned int p_idx, m_idx, s_idx, k_idx;
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unsigned char p_shift, m_shift, s_shift, k_shift;
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unsigned char p_width, m_width, s_width, k_width;
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};
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struct cmucal_clk_fixed_rate {
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struct cmucal_clk clk;
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unsigned int fixed_rate;
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};
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struct cmucal_clk_fixed_factor {
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struct cmucal_clk clk;
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unsigned short ratio;
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};
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struct cmucal_mux {
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struct cmucal_clk clk;
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unsigned int *pid;
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unsigned char num_parents;
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};
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struct cmucal_div {
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struct cmucal_clk clk;
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};
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struct cmucal_gate {
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struct cmucal_clk clk;
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};
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struct cmucal_qch {
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struct cmucal_clk clk;
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union {
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void __iomem *ignore;
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unsigned long ignore_idx;
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};
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unsigned char ig_shift;
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unsigned char ig_width;
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};
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struct cmucal_option {
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struct cmucal_clk clk;
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};
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struct cmucal_clkout {
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struct cmucal_clk clk;
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unsigned int sel;
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unsigned int en;
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};
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#define CMUCAL_VCLK(_id, _lut, _list, _seq, _switch) \
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[_id & MASK_OF_ID] = { \
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.id = _id, \
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.name = #_id, \
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.lut = _lut, \
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.list = _list, \
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.seq = _seq, \
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.num_rates = (sizeof(_lut) / sizeof((_lut)[0])), \
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.num_list = (sizeof(_list) / sizeof((_list)[0])), \
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.switch_info = _switch, \
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.ops = NULL, \
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}
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#define CMUCAL_ACPM_VCLK(_id, _lut, _list, _seq, _switch, _margin_id) \
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[_id & MASK_OF_ID] = { \
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.id = _id, \
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.name = #_id, \
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.lut = _lut, \
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.list = _list, \
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.seq = _seq, \
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.num_rates = (sizeof(_lut) / sizeof((_lut)[0])), \
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.num_list = (sizeof(_list) / sizeof((_list)[0])), \
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.switch_info = _switch, \
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.ops = NULL, \
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.margin_id = _margin_id, \
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}
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#define SFR_BLOCK(_id, _pa, _size) \
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[_id & MASK_OF_ID] = { \
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.id = _id, \
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.pa = _pa, \
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.size = _size, \
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}
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#define SFR(_id, _offset, _block) \
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[_id & MASK_OF_ID] = { \
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.id = _id, \
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.offset = _offset, \
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.block = _block, \
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}
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#define SFR_ACCESS(_id, _shift, _width, _sfr) \
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[_id & MASK_OF_ID] = { \
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.id = _id, \
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.shift = _shift, \
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.width = _width, \
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.sfr = _sfr, \
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}
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#define CLK_PLL(_typ, _id, _pid, _lock, _enable, _stable, \
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_p, _m, _s, _k, \
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_rtable, _time, _ftime) \
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[_id & MASK_OF_ID] = { \
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.clk.id = _id, \
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.clk.pid = EMPTY_CLK_ID, \
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.clk.name = #_id, \
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.clk.offset_idx = _lock, \
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.clk.enable_idx = _enable, \
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.clk.status_idx = _stable, \
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.p_idx = _p, \
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.m_idx = _m, \
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.s_idx = _s, \
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.k_idx = _k, \
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.type = _typ, \
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.umux = _pid, \
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.rate_table = _rtable, \
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.rate_count = (sizeof(_rtable) / sizeof((_rtable)[0])), \
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.lock_time = _time, \
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.flock_time = _ftime, \
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}
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#define CLK_MUX(_id, _pids, _o, _so, _eo) \
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[_id & MASK_OF_ID] = { \
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.clk.id = _id, \
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.clk.name = #_id, \
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.clk.offset_idx = _o, \
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.clk.status_idx = _so, \
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.clk.enable_idx = _eo, \
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.pid = _pids, \
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.num_parents = (sizeof(_pids) / sizeof((_pids)[0])), \
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}
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#define CLK_DIV(_id, _pid, _o, _so, _eo) \
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[_id & MASK_OF_ID] = { \
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.clk.id = _id, \
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.clk.name = #_id, \
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.clk.pid = _pid, \
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.clk.offset_idx = _o, \
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.clk.status_idx = _so, \
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.clk.enable_idx = _eo, \
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}
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#define CLK_GATE(_id, _pid, _o, _so, _eo) \
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[_id & MASK_OF_ID] = { \
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.clk.id = _id, \
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.clk.name = #_id, \
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.clk.pid = _pid, \
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.clk.offset_idx = _o, \
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.clk.status_idx = _so, \
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.clk.enable_idx = _eo, \
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}
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#ifdef CONFIG_CMUCAL_QCH_IGNORE_SUPPORT
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#define CLK_QCH(_id, _o, _so, _eo, _ig) \
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[_id & MASK_OF_ID] = { \
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.clk.id = _id, \
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.clk.name = #_id, \
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.clk.pid = EMPTY_CLK_ID, \
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.clk.offset_idx = _o, \
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.clk.status_idx = _so, \
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.clk.enable_idx = _eo, \
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.ignore_idx = _ig, \
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}
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#else
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#define CLK_QCH(_id, _o, _so, _eo) \
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[_id & MASK_OF_ID] = { \
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.clk.id = _id, \
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.clk.name = #_id, \
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.clk.pid = EMPTY_CLK_ID, \
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.clk.offset_idx = _o, \
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.clk.status_idx = _so, \
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.clk.enable_idx = _eo, \
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}
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#endif
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#define CLK_OPTION(_id, _o, _eo) \
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[_id & MASK_OF_ID] = { \
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.clk.id = _id, \
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.clk.name = #_id, \
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.clk.pid = EMPTY_CLK_ID, \
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.clk.offset_idx = _o, \
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.clk.enable_idx = _eo, \
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}
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|
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#define FIXEDRATE(_id, _frate, _eo) \
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[_id & MASK_OF_ID] = { \
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.clk.id = _id, \
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.clk.pid = EMPTY_CLK_ID, \
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.clk.name = #_id, \
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.clk.enable_idx = _eo, \
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.fixed_rate = _frate, \
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}
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|
|
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#define FIXEDFACTOR(_id, _pid, _ratio, _eo) \
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[_id & MASK_OF_ID] = { \
|
|
.clk.id = _id, \
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|
.clk.pid = _pid, \
|
|
.clk.name = #_id, \
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.clk.enable_idx = _eo, \
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.ratio = _ratio, \
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|
}
|
|
|
|
#define CLKOUT(_id, _o, _s, _w, _sel, _es, _ew, _en) \
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[_id & MASK_OF_ID] = { \
|
|
.clk.id = _id, \
|
|
.clk.name = #_id, \
|
|
.clk.offset_idx = _o, \
|
|
.clk.shift = _s, \
|
|
.clk.width = _w, \
|
|
.clk.e_shift = _es, \
|
|
.clk.e_width = _ew, \
|
|
.sel = _sel, \
|
|
.en = _en, \
|
|
}
|
|
|
|
#define PLL_RATE_MPS(_rate, _m, _p, _s) \
|
|
{ \
|
|
.rate = (_rate), \
|
|
.mdiv = (_m), \
|
|
.pdiv = (_p), \
|
|
.sdiv = (_s), \
|
|
.kdiv = (0), \
|
|
}
|
|
|
|
#define PLL_RATE_MPSK(_rate, _m, _p, _s, _k) \
|
|
{ \
|
|
.rate = (_rate), \
|
|
.mdiv = (_m), \
|
|
.pdiv = (_p), \
|
|
.sdiv = (_s), \
|
|
.kdiv = (_k), \
|
|
}
|
|
|
|
#define to_fixed_rate_clk(_clk) container_of(_clk, struct cmucal_clk_fixed_rate, clk)
|
|
#define to_fixed_factor_clk(_clk) container_of(_clk, struct cmucal_clk_fixed_factor, clk)
|
|
#define to_pll_clk(_clk) container_of(_clk, struct cmucal_pll, clk)
|
|
#define to_mux_clk(_clk) container_of(_clk, struct cmucal_mux, clk)
|
|
#define to_div_clk(_clk) container_of(_clk, struct cmucal_div, clk)
|
|
#define to_gate_clk(_clk) container_of(_clk, struct cmucal_gate, clk)
|
|
#define to_clkout(_clk) container_of(_clk, struct cmucal_clkout, clk)
|
|
#define to_qch(_clk) container_of(_clk, struct cmucal_qch, clk)
|
|
|
|
extern unsigned int cmucal_get_list_size(unsigned int type);
|
|
extern void *cmucal_get_node(unsigned int id);
|
|
extern void *cmucal_get_sfr_node(unsigned int id);
|
|
extern unsigned int cmucal_get_id(char *name);
|
|
extern unsigned int cmucal_get_id_by_addr(unsigned int addr);
|
|
extern void (*cal_data_init)(void);
|
|
#endif
|