278 lines
10 KiB
C
Executable File
278 lines
10 KiB
C
Executable File
/****************************************************************************
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*
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* Copyright (c) 2014 - 2018 Samsung Electronics Co., Ltd. All rights reserved
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*
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****************************************************************************/
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#ifndef __SCSC_MIF_ABS_H
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#define __SCSC_MIF_ABS_H
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#include <linux/version.h>
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#ifdef CONFIG_SCSC_QOS
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#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0))
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#include <soc/samsung/exynos_pm_qos.h>
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#include <linux/cpufreq.h>
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#else
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#include <linux/pm_qos.h>
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#endif
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#endif
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#include <linux/types.h>
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#include <scsc/scsc_mifram.h>
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#include <scsc/scsc_mx.h>
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struct device;
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/* To R4/M4 */
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enum scsc_mif_abs_target {
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SCSC_MIF_ABS_TARGET_R4 = 0,
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SCSC_MIF_ABS_TARGET_M4 = 1,
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#ifdef CONFIG_SCSC_MX450_GDB_SUPPORT
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SCSC_MIF_ABS_TARGET_M4_1 = 2
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#endif
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};
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#ifdef CONFIG_SCSC_SMAPPER
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#define SCSC_MIF_SMAPPER_MAX_BANKS 32
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struct scsc_mif_smapper_info {
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u32 num_entries;
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u32 mem_range_bytes;
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};
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enum scsc_mif_abs_bank_type {
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SCSC_MIF_ABS_NO_BANK = 0,
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SCSC_MIF_ABS_SMALL_BANK = 1,
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SCSC_MIF_ABS_LARGE_BANK = 2
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};
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#endif
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#ifdef CONFIG_SCSC_QOS
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struct scsc_mifqos_request {
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#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0))
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struct exynos_pm_qos_request pm_qos_req_mif;
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struct exynos_pm_qos_request pm_qos_req_int;
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struct freq_qos_request pm_qos_req_cl0;
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struct freq_qos_request pm_qos_req_cl1;
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struct cpufreq_policy* cpu_cluster0_policy;
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struct cpufreq_policy* cpu_cluster1_policy;
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#ifdef CONFIG_SOC_S5E9815
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struct freq_qos_request pm_qos_req_cl2;
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struct cpufreq_policy* cpu_cluster2_policy;
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#endif
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#else
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struct pm_qos_request pm_qos_req_mif;
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struct pm_qos_request pm_qos_req_int;
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struct pm_qos_request pm_qos_req_cl0;
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struct pm_qos_request pm_qos_req_cl1;
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#ifdef CONFIG_SOC_S5E9815
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struct pm_qos_request pm_qos_req_cl2;
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#endif
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#endif
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};
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#endif
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#define SCSC_REG_READ_WLBT_STAT 0
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/**
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* Abstraction of the Maxwell "Memory Interface" aka MIF.
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*
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* There will be at least two implementations of this
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* interface - The native AXI one and a PCIe based emulation.
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*
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* A reference to an interface will be passed to the
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* scsc_mx driver when the system startsup.
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*/
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struct scsc_mif_abs {
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/**
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* Destroy this interface.
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*
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* This should be called when the underlying device is
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* removed.
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*/
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void (*destroy)(struct scsc_mif_abs *interface);
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/* Return an unique id for this host, and prefreabrly identifies specific device (example pcie0, pcie1) */
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char *(*get_uid)(struct scsc_mif_abs *interface);
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/**
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* Controls the hardware "reset" state of the Maxwell
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* subsystem.
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*
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* Setting reset=TRUE places the subsystem in its low
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* power "reset" state. This function is called
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* by the Maxwell Manager near the end of the subsystem
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* shutdown process, before "unmapping" the interface.
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*
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* Setting reset=FALSE release the subsystem reset state.
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* The subystem will then start its cold boot sequence. This
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* function is called
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* by the Subsystem Manager near the end of the subsystem
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* startup process after installing the maxwell firmware and
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* other resources in MIF RAM.
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*/
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int (*reset)(struct scsc_mif_abs *interface, bool reset);
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/**
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* This function maps the Maxwell interface hardware (MIF
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* DRAM) into kernel memory space.
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*
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* Amount of memory allocated must be defined and returned
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* on (*allocated) by the abstraction layer implemenation.
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*
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* This returns kernel-space pointer to the start of the
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* shared MIF DRAM. The Maxwell Manager will load firmware
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* to this location and configure the MIF Heap Manager to
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* manage any unused memory at the end of the DRAM region.
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*
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* The scsc_mx driver should call this when the Maxwell
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* subsystem is required by any service client.
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*
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* The mailbox, irq and dram functions are only usable once
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* this call has returned. HERE: Should we rename this to
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* "open" and return a handle to these conditional methods?
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*/
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void *(*map)(struct scsc_mif_abs *interface, size_t *allocated);
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/**
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* The inverse of "map". Should be called once the maxwell
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* subsystem is no longer required and has been placed into
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* "reset" state (see reset method).
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*/
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void (*unmap)(struct scsc_mif_abs *interface, void *mem);
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/**
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* The Mailbox pointer returned can be used for direct access
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* to the hardware register for efficiency.
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* The pointer is guaranteed to remain valid between map and unmap calls.
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* HERE: If we are not assuming AP v R4 same-endianess then this
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* should be explicitly leu32 or u8[4] (or something equivalent).
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*/
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u32 *(*get_mbox_ptr)(struct scsc_mif_abs *interface, u32 mbox_index);
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/**
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* Incoming MIF Interrupt Hardware Controls
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*/
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/** Get the incoming interrupt source mask */
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u32 (*irq_bit_mask_status_get)(struct scsc_mif_abs *interface);
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/** Get the incoming interrupt pending (waiting *AND* not masked) mask */
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u32 (*irq_get)(struct scsc_mif_abs *interface);
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void (*irq_bit_clear)(struct scsc_mif_abs *interface, int bit_num);
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void (*irq_bit_mask)(struct scsc_mif_abs *interface, int bit_num);
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void (*irq_bit_unmask)(struct scsc_mif_abs *interface, int bit_num);
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/**
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* Outgoing MIF Interrupt Hardware Controls
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*/
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void (*irq_bit_set)(struct scsc_mif_abs *interface, int bit_num, enum scsc_mif_abs_target target);
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/**
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* Register handler for the interrupt from the
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* MIF Interrupt Hardware.
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*
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* This is used by the MIF Interrupt Manager to
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* register a handler that demultiplexes the
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* individual interrupt sources (MIF Interrupt Bits)
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* to source-specific handlers.
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*/
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void (*irq_reg_handler)(struct scsc_mif_abs *interface, void (*handler)(int irq, void *data), void *dev);
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void (*irq_unreg_handler)(struct scsc_mif_abs *interface);
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/* Clear HW interrupt line */
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void (*irq_clear)(void);
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void (*irq_reg_reset_request_handler)(struct scsc_mif_abs *interface, void (*handler)(int irq, void *data), void *dev);
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void (*irq_unreg_reset_request_handler)(struct scsc_mif_abs *interface);
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/**
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* Install suspend/resume handlers for the MIF abstraction driver
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*/
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void (*suspend_reg_handler)(struct scsc_mif_abs *abs,
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int (*suspend)(struct scsc_mif_abs *abs, void *data),
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void (*resume)(struct scsc_mif_abs *abs, void *data),
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void *data);
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void (*suspend_unreg_handler)(struct scsc_mif_abs *abs);
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/**
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* Return kernel-space pointer to MIF ram.
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* The pointer is guaranteed to remain valid between map and unmap calls.
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*/
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void *(*get_mifram_ptr)(struct scsc_mif_abs *interface, scsc_mifram_ref ref);
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/* Maps kernel-space pointer to MIF RAM to portable reference */
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int (*get_mifram_ref)(struct scsc_mif_abs *interface, void *ptr, scsc_mifram_ref *ref);
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#if IS_ENABLED(CONFIG_SCSC_MEMLOG)
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void *(*get_mifram_ptr_region2)(struct scsc_mif_abs *interface, scsc_mifram_ref ref);
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int (*get_mifram_ref_region2)(struct scsc_mif_abs *interface, void *ptr, scsc_mifram_ref *ref);
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int (*set_mem_region2)(struct scsc_mif_abs *interface, void __iomem *_mem_region2, size_t _mem_size_region2);
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void (*set_memlog_paddr)(struct scsc_mif_abs *interface, dma_addr_t paddr);
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#endif
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/* Return physical page frame number corresponding to the physical addres to which
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* the virtual address is mapped . Needed in mmap file operations*/
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uintptr_t (*get_mifram_pfn)(struct scsc_mif_abs *interface);
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/**
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* Return physical address from MIF ram address.
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*/
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void *(*get_mifram_phy_ptr)(struct scsc_mif_abs *interface, scsc_mifram_ref ref);
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/** Return a kernel device associated 1:1 with the Maxwell instance.
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* This is published only for the purpose of associating service drivers with a Maxwell instance
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* for logging purposes. Clients should not make any assumptions about the device type.
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* In some configurations this may be the associated host-interface device (AXI/PCIe),
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* but this may change in future.
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*/
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struct device *(*get_mif_device)(struct scsc_mif_abs *interface);
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void (*mif_dump_registers)(struct scsc_mif_abs *interface);
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void (*mif_cleanup)(struct scsc_mif_abs *interface);
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void (*mif_restart)(struct scsc_mif_abs *interface);
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#ifdef CONFIG_SCSC_SMAPPER
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/* SMAPPER */
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int (*mif_smapper_get_mapping)(struct scsc_mif_abs *interface, u8 *phy_map, u16 *align);
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int (*mif_smapper_get_bank_info)(struct scsc_mif_abs *interface, u8 bank, struct scsc_mif_smapper_info *bank_info);
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int (*mif_smapper_write_sram)(struct scsc_mif_abs *interface, u8 bank, u8 num_entries, u8 first_entry, dma_addr_t *addr);
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void (*mif_smapper_configure)(struct scsc_mif_abs *interface, u32 granularity);
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u32 (*mif_smapper_get_bank_base_address)(struct scsc_mif_abs *interface, u8 bank);
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#endif
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#ifdef CONFIG_SCSC_QOS
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int (*mif_pm_qos_add_request)(struct scsc_mif_abs *interface, struct scsc_mifqos_request *qos_req, enum scsc_qos_config config);
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int (*mif_pm_qos_update_request)(struct scsc_mif_abs *interface, struct scsc_mifqos_request *qos_req, enum scsc_qos_config config);
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int (*mif_pm_qos_remove_request)(struct scsc_mif_abs *interface, struct scsc_mifqos_request *qos_req);
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int (*mif_set_affinity_cpu)(struct scsc_mif_abs *interface, u8 cpu);
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#endif
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bool (*mif_reset_failure)(struct scsc_mif_abs *interface);
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int (*mif_read_register)(struct scsc_mif_abs *interface, u64 id, u32 *val);
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#ifdef CONFIG_SOC_EXYNOS7885
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/**
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* Return scsc_btabox_data structure with physical address & size of the DTB region
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* exposed by the platform driver. The platform driver uses it to configure BAAW1.
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* The BT driver needs to know and pass it down to BT firmware to configure ABOX
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* shared data structure
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*/
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void (*get_abox_shared_mem)(struct scsc_mif_abs *interface, void **data);
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#endif
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/* To un/register callbacks to mxman functionality */
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void (*recovery_disabled_reg)(struct scsc_mif_abs *interface, bool (*handler)(void));
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void (*recovery_disabled_unreg)(struct scsc_mif_abs *interface);
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};
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struct device;
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struct scsc_mif_abs_driver {
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char *name;
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void (*probe)(struct scsc_mif_abs_driver *abs_driver, struct scsc_mif_abs *abs);
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void (*remove)(struct scsc_mif_abs *abs);
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};
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extern void scsc_mif_abs_register(struct scsc_mif_abs_driver *driver);
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extern void scsc_mif_abs_unregister(struct scsc_mif_abs_driver *driver);
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/* mmap-debug driver */
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struct scsc_mif_mmap_driver {
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char *name;
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void (*probe)(struct scsc_mif_mmap_driver *mmap_driver, struct scsc_mif_abs *abs);
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void (*remove)(struct scsc_mif_abs *abs);
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};
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extern void scsc_mif_mmap_register(struct scsc_mif_mmap_driver *mmap_driver);
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extern void scsc_mif_mmap_unregister(struct scsc_mif_mmap_driver *mmap_driver);
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#endif
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