132 lines
3.6 KiB
C
Executable File
132 lines
3.6 KiB
C
Executable File
/*
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* Samsung Exynos5 SoC series FIMC-IS driver
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*
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef FIMC_IS_DEVICE_FLITE_H
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#define FIMC_IS_DEVICE_FLITE_H
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#include <linux/interrupt.h>
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#include "fimc-is-type.h"
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#define EXPECT_FRAME_START 0
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#define EXPECT_FRAME_END 1
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#define FLITE_NOTIFY_FSTART 0
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#define FLITE_NOTIFY_FEND 1
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#define FLITE_ENABLE_FLAG 1
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#define FLITE_ENABLE_MASK 0xFFFF
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#define FLITE_ENABLE_SHIFT 0
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#define FLITE_NOWAIT_FLAG 1
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#define FLITE_NOWAIT_MASK 0xFFFF0000
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#define FLITE_NOWAIT_SHIFT 16
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#define FLITE_OVERFLOW_COUNT 10
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#define FLITE_VVALID_TIME_BASE 32 /* ms */
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struct fimc_is_device_sensor;
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enum fimc_is_flite_state {
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/* finish state */
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FLITE_LAST_CAPTURE = 0,
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/* flite join ischain */
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FLITE_JOIN_ISCHAIN,
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/* one the fly output */
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FLITE_OTF_WITH_3AA,
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/* If it's dummy, H/W setting can't be applied */
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FLITE_DUMMY,
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/* WDMA flag */
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FLITE_DMA_ENABLE,
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FLITE_START_STREAM
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};
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enum fimc_is_flite_buf_done_mode {
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FLITE_BUF_DONE_NORMAL = 0, /* when end-irq */
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FLITE_BUF_DONE_EARLY = 1, /* when delayed work queue since start-irq */
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};
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/*
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* 10p means 10% early than end irq. We supposed that VVALID time is variable
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* ex. 32 * 0.1 = 3ms, early interval is (33 - 3) = 29ms
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* 32 * 0.2 = 6ms, (33 - 6) = 26ms
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* 32 * 0.3 = 9ms, (33 - 9) = 23ms
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* 32 * 0.4 = 12ms, (33 - 12) = 20ms
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*/
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enum fimc_is_flite_early_buf_done_mode {
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FLITE_BUF_EARLY_NOTHING = 0,
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FLITE_BUF_EARLY_10P = 1, /* 10%(29ms) 3ms */
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FLITE_BUF_EARLY_20P = 2, /* 20%(26ms) 6ms */
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FLITE_BUF_EARLY_30P = 3, /* 30%(23ms) 9ms */
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FLITE_BUF_EARLY_40P = 4, /* 40%(20ms) 12ms */
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};
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struct fimc_is_device_flite {
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u32 instance;
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u32 __iomem *base_reg;
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resource_size_t regs_start;
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resource_size_t regs_end;
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int irq;
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unsigned long state;
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wait_queue_head_t wait_queue;
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struct fimc_is_image image;
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struct fimc_is_framemgr *framemgr;
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u32 overflow_cnt;
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u32 csi; /* which csi channel is connceted */
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u32 group; /* which 3aa gorup is connected when otf is enable */
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u32 sw_checker;
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atomic_t fcount;
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u32 tasklet_param_str;
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struct tasklet_struct tasklet_flite_str;
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u32 tasklet_param_end;
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struct tasklet_struct tasklet_flite_end;
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/* for early buffer done */
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u32 buf_done_mode;
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u32 early_buf_done_mode;
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u32 buf_done_wait_time;
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bool early_work_skip;
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bool early_work_called;
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struct tasklet_struct tasklet_flite_early_end;
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struct workqueue_struct *early_workqueue;
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struct delayed_work early_work_wq;
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void (*chk_early_buf_done)(struct fimc_is_device_flite *flite, u32 framerate, u32 position);
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/* pointer address from device sensor */
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struct v4l2_subdev **subdev;
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};
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#if defined(CONFIG_EXYNOS_FIMC_BNS)
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int fimc_is_flite_probe(struct fimc_is_device_sensor *device,
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u32 instance);
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int fimc_is_flite_open(struct v4l2_subdev *subdev,
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struct fimc_is_framemgr *framemgr);
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int fimc_is_flite_close(struct v4l2_subdev *subdev);
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#else
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static inline int fimc_is_flite_probe(struct fimc_is_device_sensor *device,
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u32 instance) {return 0;}
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static inline int fimc_is_flite_open(struct v4l2_subdev *subdev,
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struct fimc_is_framemgr *framemgr) {return 0;}
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static inline int fimc_is_flite_close(struct v4l2_subdev *subdev) {return 0;}
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#endif
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extern u32 __iomem *notify_fcount_sen0;
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extern u32 __iomem *notify_fcount_sen1;
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extern u32 __iomem *notify_fcount_sen2;
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extern u32 __iomem *notify_fcount_sen3;
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#endif
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