411 lines
10 KiB
C
Executable File
411 lines
10 KiB
C
Executable File
/*
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* LPC32xx built-in touchscreen driver
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*
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* Copyright (C) 2010 NXP Semiconductors
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/platform_device.h>
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#include <linux/input.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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/*
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* Touchscreen controller register offsets
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*/
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#define LPC32XX_TSC_STAT 0x00
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#define LPC32XX_TSC_SEL 0x04
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#define LPC32XX_TSC_CON 0x08
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#define LPC32XX_TSC_FIFO 0x0C
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#define LPC32XX_TSC_DTR 0x10
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#define LPC32XX_TSC_RTR 0x14
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#define LPC32XX_TSC_UTR 0x18
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#define LPC32XX_TSC_TTR 0x1C
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#define LPC32XX_TSC_DXP 0x20
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#define LPC32XX_TSC_MIN_X 0x24
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#define LPC32XX_TSC_MAX_X 0x28
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#define LPC32XX_TSC_MIN_Y 0x2C
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#define LPC32XX_TSC_MAX_Y 0x30
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#define LPC32XX_TSC_AUX_UTR 0x34
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#define LPC32XX_TSC_AUX_MIN 0x38
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#define LPC32XX_TSC_AUX_MAX 0x3C
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#define LPC32XX_TSC_STAT_FIFO_OVRRN (1 << 8)
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#define LPC32XX_TSC_STAT_FIFO_EMPTY (1 << 7)
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#define LPC32XX_TSC_SEL_DEFVAL 0x0284
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#define LPC32XX_TSC_ADCCON_IRQ_TO_FIFO_4 (0x1 << 11)
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#define LPC32XX_TSC_ADCCON_X_SAMPLE_SIZE(s) ((10 - (s)) << 7)
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#define LPC32XX_TSC_ADCCON_Y_SAMPLE_SIZE(s) ((10 - (s)) << 4)
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#define LPC32XX_TSC_ADCCON_POWER_UP (1 << 2)
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#define LPC32XX_TSC_ADCCON_AUTO_EN (1 << 0)
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#define LPC32XX_TSC_FIFO_TS_P_LEVEL (1 << 31)
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#define LPC32XX_TSC_FIFO_NORMALIZE_X_VAL(x) (((x) & 0x03FF0000) >> 16)
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#define LPC32XX_TSC_FIFO_NORMALIZE_Y_VAL(y) ((y) & 0x000003FF)
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#define LPC32XX_TSC_ADCDAT_VALUE_MASK 0x000003FF
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#define LPC32XX_TSC_MIN_XY_VAL 0x0
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#define LPC32XX_TSC_MAX_XY_VAL 0x3FF
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#define MOD_NAME "ts-lpc32xx"
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#define tsc_readl(dev, reg) \
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__raw_readl((dev)->tsc_base + (reg))
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#define tsc_writel(dev, reg, val) \
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__raw_writel((val), (dev)->tsc_base + (reg))
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struct lpc32xx_tsc {
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struct input_dev *dev;
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void __iomem *tsc_base;
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int irq;
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struct clk *clk;
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};
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static void lpc32xx_fifo_clear(struct lpc32xx_tsc *tsc)
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{
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while (!(tsc_readl(tsc, LPC32XX_TSC_STAT) &
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LPC32XX_TSC_STAT_FIFO_EMPTY))
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tsc_readl(tsc, LPC32XX_TSC_FIFO);
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}
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static irqreturn_t lpc32xx_ts_interrupt(int irq, void *dev_id)
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{
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u32 tmp, rv[4], xs[4], ys[4];
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int idx;
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struct lpc32xx_tsc *tsc = dev_id;
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struct input_dev *input = tsc->dev;
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tmp = tsc_readl(tsc, LPC32XX_TSC_STAT);
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if (tmp & LPC32XX_TSC_STAT_FIFO_OVRRN) {
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/* FIFO overflow - throw away samples */
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lpc32xx_fifo_clear(tsc);
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return IRQ_HANDLED;
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}
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/*
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* Gather and normalize 4 samples. Pen-up events may have less
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* than 4 samples, but its ok to pop 4 and let the last sample
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* pen status check drop the samples.
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*/
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idx = 0;
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while (idx < 4 &&
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!(tsc_readl(tsc, LPC32XX_TSC_STAT) &
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LPC32XX_TSC_STAT_FIFO_EMPTY)) {
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tmp = tsc_readl(tsc, LPC32XX_TSC_FIFO);
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xs[idx] = LPC32XX_TSC_ADCDAT_VALUE_MASK -
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LPC32XX_TSC_FIFO_NORMALIZE_X_VAL(tmp);
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ys[idx] = LPC32XX_TSC_ADCDAT_VALUE_MASK -
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LPC32XX_TSC_FIFO_NORMALIZE_Y_VAL(tmp);
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rv[idx] = tmp;
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idx++;
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}
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/* Data is only valid if pen is still down in last sample */
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if (!(rv[3] & LPC32XX_TSC_FIFO_TS_P_LEVEL) && idx == 4) {
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/* Use average of 2nd and 3rd sample for position */
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input_report_abs(input, ABS_X, (xs[1] + xs[2]) / 2);
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input_report_abs(input, ABS_Y, (ys[1] + ys[2]) / 2);
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input_report_key(input, BTN_TOUCH, 1);
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} else {
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input_report_key(input, BTN_TOUCH, 0);
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}
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input_sync(input);
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return IRQ_HANDLED;
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}
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static void lpc32xx_stop_tsc(struct lpc32xx_tsc *tsc)
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{
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/* Disable auto mode */
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tsc_writel(tsc, LPC32XX_TSC_CON,
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tsc_readl(tsc, LPC32XX_TSC_CON) &
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~LPC32XX_TSC_ADCCON_AUTO_EN);
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clk_disable_unprepare(tsc->clk);
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}
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static int lpc32xx_setup_tsc(struct lpc32xx_tsc *tsc)
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{
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u32 tmp;
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int err;
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err = clk_prepare_enable(tsc->clk);
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if (err)
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return err;
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tmp = tsc_readl(tsc, LPC32XX_TSC_CON) & ~LPC32XX_TSC_ADCCON_POWER_UP;
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/* Set the TSC FIFO depth to 4 samples @ 10-bits per sample (max) */
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tmp = LPC32XX_TSC_ADCCON_IRQ_TO_FIFO_4 |
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LPC32XX_TSC_ADCCON_X_SAMPLE_SIZE(10) |
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LPC32XX_TSC_ADCCON_Y_SAMPLE_SIZE(10);
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tsc_writel(tsc, LPC32XX_TSC_CON, tmp);
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/* These values are all preset */
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tsc_writel(tsc, LPC32XX_TSC_SEL, LPC32XX_TSC_SEL_DEFVAL);
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tsc_writel(tsc, LPC32XX_TSC_MIN_X, LPC32XX_TSC_MIN_XY_VAL);
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tsc_writel(tsc, LPC32XX_TSC_MAX_X, LPC32XX_TSC_MAX_XY_VAL);
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tsc_writel(tsc, LPC32XX_TSC_MIN_Y, LPC32XX_TSC_MIN_XY_VAL);
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tsc_writel(tsc, LPC32XX_TSC_MAX_Y, LPC32XX_TSC_MAX_XY_VAL);
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/* Aux support is not used */
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tsc_writel(tsc, LPC32XX_TSC_AUX_UTR, 0);
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tsc_writel(tsc, LPC32XX_TSC_AUX_MIN, 0);
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tsc_writel(tsc, LPC32XX_TSC_AUX_MAX, 0);
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/*
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* Set sample rate to about 240Hz per X/Y pair. A single measurement
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* consists of 4 pairs which gives about a 60Hz sample rate based on
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* a stable 32768Hz clock source. Values are in clocks.
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* Rate is (32768 / (RTR + XCONV + RTR + YCONV + DXP + TTR + UTR) / 4
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*/
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tsc_writel(tsc, LPC32XX_TSC_RTR, 0x2);
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tsc_writel(tsc, LPC32XX_TSC_DTR, 0x2);
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tsc_writel(tsc, LPC32XX_TSC_TTR, 0x10);
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tsc_writel(tsc, LPC32XX_TSC_DXP, 0x4);
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tsc_writel(tsc, LPC32XX_TSC_UTR, 88);
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lpc32xx_fifo_clear(tsc);
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/* Enable automatic ts event capture */
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tsc_writel(tsc, LPC32XX_TSC_CON, tmp | LPC32XX_TSC_ADCCON_AUTO_EN);
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return 0;
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}
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static int lpc32xx_ts_open(struct input_dev *dev)
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{
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struct lpc32xx_tsc *tsc = input_get_drvdata(dev);
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return lpc32xx_setup_tsc(tsc);
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}
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static void lpc32xx_ts_close(struct input_dev *dev)
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{
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struct lpc32xx_tsc *tsc = input_get_drvdata(dev);
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lpc32xx_stop_tsc(tsc);
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}
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static int lpc32xx_ts_probe(struct platform_device *pdev)
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{
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struct lpc32xx_tsc *tsc;
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struct input_dev *input;
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struct resource *res;
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resource_size_t size;
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int irq;
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int error;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&pdev->dev, "Can't get memory resource\n");
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return -ENOENT;
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}
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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dev_err(&pdev->dev, "Can't get interrupt resource\n");
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return irq;
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}
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tsc = kzalloc(sizeof(*tsc), GFP_KERNEL);
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input = input_allocate_device();
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if (!tsc || !input) {
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dev_err(&pdev->dev, "failed allocating memory\n");
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error = -ENOMEM;
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goto err_free_mem;
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}
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tsc->dev = input;
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tsc->irq = irq;
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size = resource_size(res);
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if (!request_mem_region(res->start, size, pdev->name)) {
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dev_err(&pdev->dev, "TSC registers are not free\n");
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error = -EBUSY;
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goto err_free_mem;
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}
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tsc->tsc_base = ioremap(res->start, size);
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if (!tsc->tsc_base) {
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dev_err(&pdev->dev, "Can't map memory\n");
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error = -ENOMEM;
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goto err_release_mem;
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}
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tsc->clk = clk_get(&pdev->dev, NULL);
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if (IS_ERR(tsc->clk)) {
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dev_err(&pdev->dev, "failed getting clock\n");
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error = PTR_ERR(tsc->clk);
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goto err_unmap;
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}
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input->name = MOD_NAME;
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input->phys = "lpc32xx/input0";
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input->id.bustype = BUS_HOST;
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input->id.vendor = 0x0001;
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input->id.product = 0x0002;
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input->id.version = 0x0100;
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input->dev.parent = &pdev->dev;
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input->open = lpc32xx_ts_open;
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input->close = lpc32xx_ts_close;
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input->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
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input->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
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input_set_abs_params(input, ABS_X, LPC32XX_TSC_MIN_XY_VAL,
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LPC32XX_TSC_MAX_XY_VAL, 0, 0);
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input_set_abs_params(input, ABS_Y, LPC32XX_TSC_MIN_XY_VAL,
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LPC32XX_TSC_MAX_XY_VAL, 0, 0);
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input_set_drvdata(input, tsc);
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error = request_irq(tsc->irq, lpc32xx_ts_interrupt,
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0, pdev->name, tsc);
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if (error) {
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dev_err(&pdev->dev, "failed requesting interrupt\n");
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goto err_put_clock;
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}
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error = input_register_device(input);
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if (error) {
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dev_err(&pdev->dev, "failed registering input device\n");
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goto err_free_irq;
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}
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platform_set_drvdata(pdev, tsc);
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device_init_wakeup(&pdev->dev, 1);
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return 0;
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err_free_irq:
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free_irq(tsc->irq, tsc);
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err_put_clock:
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clk_put(tsc->clk);
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err_unmap:
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iounmap(tsc->tsc_base);
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err_release_mem:
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release_mem_region(res->start, size);
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err_free_mem:
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input_free_device(input);
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kfree(tsc);
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return error;
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}
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static int lpc32xx_ts_remove(struct platform_device *pdev)
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{
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struct lpc32xx_tsc *tsc = platform_get_drvdata(pdev);
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struct resource *res;
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free_irq(tsc->irq, tsc);
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input_unregister_device(tsc->dev);
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clk_put(tsc->clk);
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iounmap(tsc->tsc_base);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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release_mem_region(res->start, resource_size(res));
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kfree(tsc);
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return 0;
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}
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#ifdef CONFIG_PM
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static int lpc32xx_ts_suspend(struct device *dev)
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{
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struct lpc32xx_tsc *tsc = dev_get_drvdata(dev);
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struct input_dev *input = tsc->dev;
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/*
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* Suspend and resume can be called when the device hasn't been
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* enabled. If there are no users that have the device open, then
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* avoid calling the TSC stop and start functions as the TSC
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* isn't yet clocked.
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*/
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mutex_lock(&input->mutex);
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if (input->users) {
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if (device_may_wakeup(dev))
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enable_irq_wake(tsc->irq);
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else
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lpc32xx_stop_tsc(tsc);
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}
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mutex_unlock(&input->mutex);
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return 0;
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}
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static int lpc32xx_ts_resume(struct device *dev)
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{
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struct lpc32xx_tsc *tsc = dev_get_drvdata(dev);
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struct input_dev *input = tsc->dev;
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mutex_lock(&input->mutex);
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if (input->users) {
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if (device_may_wakeup(dev))
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disable_irq_wake(tsc->irq);
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else
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lpc32xx_setup_tsc(tsc);
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}
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mutex_unlock(&input->mutex);
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return 0;
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}
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static const struct dev_pm_ops lpc32xx_ts_pm_ops = {
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.suspend = lpc32xx_ts_suspend,
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.resume = lpc32xx_ts_resume,
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};
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#define LPC32XX_TS_PM_OPS (&lpc32xx_ts_pm_ops)
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#else
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#define LPC32XX_TS_PM_OPS NULL
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#endif
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#ifdef CONFIG_OF
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static const struct of_device_id lpc32xx_tsc_of_match[] = {
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{ .compatible = "nxp,lpc3220-tsc", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, lpc32xx_tsc_of_match);
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#endif
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static struct platform_driver lpc32xx_ts_driver = {
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.probe = lpc32xx_ts_probe,
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.remove = lpc32xx_ts_remove,
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.driver = {
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.name = MOD_NAME,
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.pm = LPC32XX_TS_PM_OPS,
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.of_match_table = of_match_ptr(lpc32xx_tsc_of_match),
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},
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};
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module_platform_driver(lpc32xx_ts_driver);
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MODULE_AUTHOR("Kevin Wells <kevin.wells@nxp.com");
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MODULE_DESCRIPTION("LPC32XX TSC Driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:lpc32xx_ts");
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