326 lines
9.2 KiB
C
Executable File
326 lines
9.2 KiB
C
Executable File
/* sound/soc/samsung/vts/vts.h
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*
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* ALSA SoC - Samsung VTS driver
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*
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* Copyright (c) 2016 Samsung Electronics Co. Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __SND_SOC_VTS_H
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#define __SND_SOC_VTS_H
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#include <sound/memalloc.h>
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#include <linux/wakelock.h>
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/* SYSREG_VTS */
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#define VTS_DEBUG (0x0404)
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#define VTS_DMIC_CLK_CTRL (0x0408)
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#define VTS_HWACG_CM4_CLKREQ (0x0428)
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#define VTS_DMIC_CLK_CON (0x0434)
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#define VTS_SYSPOWER_CTRL (0x0500)
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#define VTS_SYSPOWER_STATUS (0x0504)
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/* VTS_DEBUG */
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#define VTS_NMI_EN_BY_WDT_OFFSET (0)
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#define VTS_NMI_EN_BY_WDT_SIZE (1)
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/* VTS_DMIC_CLK_CTRL */
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#define VTS_CG_STATUS_OFFSET (5)
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#define VTS_CG_STATUS_SIZE (1)
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#define VTS_CLK_ENABLE_OFFSET (4)
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#define VTS_CLK_ENABLE_SIZE (1)
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#define VTS_CLK_SEL_OFFSET (0)
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#define VTS_CLK_SEL_SIZE (1)
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/* VTS_HWACG_CM4_CLKREQ */
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#define VTS_MASK_OFFSET (0)
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#define VTS_MASK_SIZE (32)
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/* VTS_DMIC_CLK_CON */
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#define VTS_ENABLE_CLK_GEN_OFFSET (0)
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#define VTS_ENABLE_CLK_GEN_SIZE (1)
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#define VTS_SEL_EXT_DMIC_CLK_OFFSET (1)
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#define VTS_SEL_EXT_DMIC_CLK_SIZE (1)
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#define VTS_ENABLE_CLK_CLK_GEN_OFFSET (14)
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#define VTS_ENABLE_CLK_CLK_GEN_SIZE (1)
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/* VTS_SYSPOWER_CTRL */
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#define VTS_SYSPOWER_CTRL_OFFSET (0)
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#define VTS_SYSPOWER_CTRL_SIZE (1)
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/* VTS_SYSPOWER_STATUS */
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#define VTS_SYSPOWER_STATUS_OFFSET (0)
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#define VTS_SYSPOWER_STATUS_SIZE (1)
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#define VTS_DMIC_ENABLE_DMIC_IF (0x0000)
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#define VTS_DMIC_CONTROL_DMIC_IF (0x0004)
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/* VTS_DMIC_ENABLE_DMIC_IF */
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#define VTS_DMIC_ENABLE_DMIC_IF_OFFSET (31)
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#define VTS_DMIC_ENABLE_DMIC_IF_SIZE (1)
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#define VTS_DMIC_PERIOD_DATA2REQ_OFFSET (16)
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#define VTS_DMIC_PERIOD_DATA2REQ_SIZE (2)
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/* VTS_DMIC_CONTROL_DMIC_IF */
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#define VTS_DMIC_HPF_EN_OFFSET (31)
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#define VTS_DMIC_HPF_EN_SIZE (1)
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#define VTS_DMIC_HPF_SEL_OFFSET (28)
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#define VTS_DMIC_HPF_SEL_SIZE (1)
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#define VTS_DMIC_CPS_SEL_OFFSET (27)
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#define VTS_DMIC_CPS_SEL_SIZE (1)
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#define VTS_DMIC_GAIN_OFFSET (24)
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#define VTS_DMIC_GAIN_SIZE (3)
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#define VTS_DMIC_DMIC_SEL_OFFSET (18)
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#define VTS_DMIC_DMIC_SEL_SIZE (1)
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#define VTS_DMIC_RCH_EN_OFFSET (17)
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#define VTS_DMIC_RCH_EN_SIZE (1)
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#define VTS_DMIC_LCH_EN_OFFSET (16)
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#define VTS_DMIC_LCH_EN_SIZE (1)
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#define VTS_DMIC_SYS_SEL_OFFSET (12)
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#define VTS_DMIC_SYS_SEL_SIZE (2)
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#define VTS_DMIC_POLARITY_CLK_OFFSET (10)
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#define VTS_DMIC_POLARITY_CLK_SIZE (1)
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#define VTS_DMIC_POLARITY_OUTPUT_OFFSET (9)
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#define VTS_DMIC_POLARITY_OUTPUT_SIZE (1)
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#define VTS_DMIC_POLARITY_INPUT_OFFSET (8)
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#define VTS_DMIC_POLARITY_INPUT_SIZE (1)
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#define VTS_DMIC_OVFW_CTRL_OFFSET (4)
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#define VTS_DMIC_OVFW_CTRL_SIZE (1)
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#define VTS_DMIC_CIC_SEL_OFFSET (0)
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#define VTS_DMIC_CIC_SEL_SIZE (1)
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/* CM4 */
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#define VTS_CM4_R(x) (0x0010 + (x * 0x4))
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#define VTS_CM4_PC (0x0004)
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#define VTS_IRQ_VTS_ERROR (16)
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#define VTS_IRQ_VTS_BOOT_COMPLETED (17)
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#define VTS_IRQ_VTS_IPC_RECEIVED (18)
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#define VTS_IRQ_VTS_VOICE_TRIGGERED (19)
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#define VTS_IRQ_VTS_PERIOD_ELAPSED (20)
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#define VTS_IRQ_VTS_REC_PERIOD_ELAPSED (21)
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#define VTS_IRQ_VTS_DBGLOG_BUFZERO (22)
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#define VTS_IRQ_VTS_DBGLOG_BUFONE (23)
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#define VTS_IRQ_VTS_AUDIO_DUMP (24)
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#define VTS_IRQ_VTS_LOG_DUMP (25)
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#define VTS_IRQ_COUNT (26)
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#define VTS_IRQ_AP_IPC_RECEIVED (0)
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#define VTS_IRQ_AP_SET_DRAM_BUFFER (1)
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#define VTS_IRQ_AP_START_RECOGNITION (2)
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#define VTS_IRQ_AP_STOP_RECOGNITION (3)
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#define VTS_IRQ_AP_START_COPY (4)
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#define VTS_IRQ_AP_STOP_COPY (5)
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#define VTS_IRQ_AP_SET_MODE (6)
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#define VTS_IRQ_AP_POWER_DOWN (7)
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#define VTS_IRQ_AP_TARGET_SIZE (8)
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#define VTS_IRQ_AP_SET_REC_BUFFER (9)
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#define VTS_IRQ_AP_START_REC (10)
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#define VTS_IRQ_AP_STOP_REC (11)
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#define VTS_IRQ_AP_RESTART_RECOGNITION (13)
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#define VTS_IRQ_AP_TEST_COMMAND (15)
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#define VTS_IRQ_LIMIT (32)
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#define VTS_BAAW_BASE (0x60000000)
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#define VTS_BAAW_SRC_START_ADDRESS (0x10000)
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#define VTS_BAAW_SRC_END_ADDRESS (0x10004)
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#define VTS_BAAW_REMAPPED_ADDRESS (0x10008)
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#define VTS_BAAW_INIT_DONE (0x1000C)
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#define BUFFER_BYTES_MAX (0xa0000)
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#define PERIOD_BYTES_MIN (SZ_4)
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#define PERIOD_BYTES_MAX (BUFFER_BYTES_MAX / 2)
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#define SOUND_MODEL_SIZE_MAX (SZ_32K)
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#define SOUND_MODEL_COUNT (3)
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/* DRAM for copying VTS firmware logs */
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#define LOG_BUFFER_BYTES_MAX (0x2000)
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#define VTS_SRAMLOG_MSGS_OFFSET (0x59000)
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/* VTS firmware version information offset */
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#define VTSFW_VERSION_OFFSET (0x7c)
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#define DETLIB_VERSION_OFFSET (0x78)
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/* VTS Model Binary Max buffer sizes */
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#define VTS_MODEL_SVOICE_BIN_MAXSZ (SZ_64K)
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#define VTS_MODEL_GOOGLE_BIN_MAXSZ (SZ_64K)
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enum ipc_state {
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IDLE,
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SEND_MSG,
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SEND_MSG_OK,
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SEND_MSG_FAIL,
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};
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enum trigger {
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TRIGGER_NONE = -1,
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TRIGGER_SVOICE = 0,
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TRIGGER_GOOGLE = 1,
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TRIGGER_SENSORY = 2,
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TRIGGER_COUNT,
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};
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enum vts_platform_type {
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PLATFORM_VTS_NORMAL_RECORD,
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PLATFORM_VTS_TRIGGER_RECORD,
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};
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enum executionmode {
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//default is off
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VTS_OFF_MODE = 0,
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//voice-trig-mode:Both LPSD & Trigger are enabled
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VTS_VOICE_TRIGGER_MODE = 1,
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//sound-detect-mode: Low Power sound Detect
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VTS_SOUND_DETECT_MODE = 2,
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//vt-always-mode: key phrase Detection only(Trigger)
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VTS_VT_ALWAYS_ON_MODE = 3,
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//google-trigger: key phrase Detection only(Trigger)
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VTS_GOOGLE_TRIGGER_MODE = 4,
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//sensory-trigger: key phrase Detection only(Trigger)
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VTS_SENSORY_TRIGGER_MODE = 5,
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//off:voice-trig-mode:Both LPSD & Trigger are enabled
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VTS_VOICE_TRIGGER_MODE_OFF = 6,
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//off:sound-detect-mode: Low Power sound Detect
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VTS_SOUND_DETECT_MODE_OFF = 7,
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//off:vt-always-mode: key phrase Detection only(Trigger)
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VTS_VT_ALWAYS_ON_MODE_OFF = 8,
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//off:google-trigger: key phrase Detection only(Trigger)
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VTS_GOOGLE_TRIGGER_MODE_OFF = 9,
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//off:sensory-trigger: key phrase Detection only(Trigger)
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VTS_SENSORY_TRIGGER_MODE_OFF = 10,
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VTS_MODE_COUNT,
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};
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enum vts_dump_type {
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KERNEL_PANIC_DUMP = 0,
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RUNTIME_SUSPEND_DUMP = 1,
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};
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enum vts_test_command {
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VTS_DISABLE_LOGDUMP = 0x01000000,
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VTS_ENABLE_LOGDUMP = 0x02000000,
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VTS_DISABLE_AUDIODUMP = 0x04000000,
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VTS_ENABLE_AUDIODUMP = 0x08000000,
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VTS_DISABLE_DEBUGLOG = 0x10000000,
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VTS_ENABLE_DEBUGLOG = 0x20000000,
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VTS_ENABLE_SRAM_LOG = 0x80000000,
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};
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struct vts_ipc_msg {
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int msg;
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u32 values[3];
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};
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enum vts_micconf_type {
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VTS_MICCONF_FOR_RECORD = 0,
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VTS_MICCONF_FOR_TRIGGER = 1,
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VTS_MICCONF_FOR_GOOGLE = 2,
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};
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enum vts_state_machine {
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VTS_STATE_NONE = 0, //runtime_suspended state
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VTS_STATE_VOICECALL = 1, //sram L2Cache voicecall state
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VTS_STATE_IDLE = 2, //runtime_resume state
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VTS_STATE_RECOG_STARTED = 3, //Voice Recognization started
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VTS_STATE_RECOG_TRIGGERED = 4, //Voice Recognize triggered
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VTS_STATE_SEAMLESS_REC_STARTED = 5, //seamless record started
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VTS_STATE_SEAMLESS_REC_STOPPED = 6, //seamless record started
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VTS_STATE_RECOG_STOPPED = 7, //Voice Recognization stopped
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};
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struct vts_model_bin_info {
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unsigned char *data;
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size_t actual_sz;
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size_t max_sz;
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bool loaded;
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};
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struct vts_data {
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struct platform_device *pdev;
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struct snd_soc_component *cmpnt;
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void __iomem *sfr_base;
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void __iomem *baaw_base;
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void __iomem *sram_base;
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void __iomem *dmic_base;
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void __iomem *gpr_base;
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size_t sram_size;
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struct regmap *regmap_dmic;
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struct clk *clk_rco;
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struct clk *clk_dmic;
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struct clk *clk_dmic_if;
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struct clk *clk_dmic_sync;
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struct pinctrl *pinctrl;
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unsigned int vtsfw_version;
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unsigned int vtsdetectlib_version;
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const struct firmware *firmware;
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unsigned int vtsdma_count;
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unsigned long syssel_rate;
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struct platform_device *pdev_mailbox;
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struct platform_device *pdev_vtsdma[2];
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struct proc_dir_entry *proc_dir_entry;
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int irq[VTS_IRQ_LIMIT];
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volatile enum ipc_state ipc_state_ap;
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wait_queue_head_t ipc_wait_queue;
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spinlock_t ipc_spinlock;
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struct mutex ipc_mutex;
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u32 dma_area_vts;
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struct snd_dma_buffer dmab;
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struct snd_dma_buffer dmab_rec;
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struct snd_dma_buffer dmab_log;
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u32 target_size;
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volatile enum trigger active_trigger;
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u32 voicerecog_start;
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enum executionmode exec_mode;
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bool vts_ready;
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volatile unsigned long sram_acquired;
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volatile bool enabled;
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volatile bool running;
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bool voicecall_enabled;
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struct snd_soc_card *card;
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int micclk_init_cnt;
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unsigned int mic_ready;
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bool irq_state;
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u32 lpsdgain;
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u32 dmicgain;
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u32 amicgain;
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char *sramlog_baseaddr;
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u32 running_ipc;
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struct wake_lock wake_lock;
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unsigned int vts_state;
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u32 vtslog_enabled;
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bool audiodump_enabled;
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bool logdump_enabled;
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struct vts_model_bin_info svoice_info;
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struct vts_model_bin_info google_info;
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};
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struct vts_platform_data {
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unsigned int id;
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struct platform_device *pdev_vts;
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struct vts_data *vts_data;
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struct snd_pcm_substream *substream;
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enum vts_platform_type type;
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volatile unsigned int pointer;
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};
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struct vts_dbg_dump {
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char sram[SZ_2K];
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unsigned int gpr[17];
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long long time;
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char reason[SZ_32];
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};
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struct vts_log_buffer {
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char *addr;
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unsigned int size;
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};
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extern int vts_start_ipc_transaction(struct device *dev, struct vts_data *data,
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int msg, u32 (*values)[3], int atomic, int sync);
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extern int vts_send_ipc_ack(struct vts_data *data, u32 result);
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extern void vts_register_dma(struct platform_device *pdev_vts,
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struct platform_device *pdev_vts_dma, unsigned int id);
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extern int vts_set_dmicctrl(struct platform_device *pdev, int micconf_type, bool enable);
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#endif /* __SND_SOC_VTS_H */
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