255 lines
7.6 KiB
C
Executable File
255 lines
7.6 KiB
C
Executable File
/*
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* Copyright (c) 2012 Samsung Electronics.
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*
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* EXYNOS - SMC Call
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __SMC_H__
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#define __SMC_H__
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/* For Power Management */
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#define SMC_CMD_SLEEP (-3)
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#define SMC_CMD_CPU1BOOT (-4)
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#define SMC_CMD_CPU0AFTR (-5)
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#define SMC_CMD_SAVE (-6)
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#define SMC_CMD_SHUTDOWN (-7)
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#define SMC_CMD_CPUMAP (-10)
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/* For Accessing CP15/SFR (General) */
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#define SMC_CMD_REG (-101)
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/* For setting memory for debug */
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#define SMC_CMD_SET_DEBUG_MEM (-120)
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#define SMC_CMD_GET_LOCKUP_REASON (-121)
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#define SMC_CMD_KERNEL_PANIC_NOTICE (-122)
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#define SMC_CMD_SET_SEH_ADDRESS (-123)
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#define SMC_CMD_LOCKUP_NOTICE (0x8200007C)
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#define SMC_CMD_GET_SJTAG_STATUS (0x8200012E)
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/* For protecting kernel text area */
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#define SMC_CMD_PROTECT_KERNEL_TEXT (-125)
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/* For Security Dump Manager */
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#define SMC_CMD_DUMP_SECURE_REGION (-130)
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#define SMC_CMD_FLUSH_SECDRAM (-131)
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/* For D-GPIO/D-TZPC */
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#define SMC_CMD_PREAPRE_PD_ONOFF (0x82000410)
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/* For FMP/SMU Ctrl */
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#define SMC_CMD_FMP_SECURITY (0xC2001810)
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#define SMC_CMD_FMP_DISK_KEY_STORED (0xC2001820)
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#define SMC_CMD_FMP_DISK_KEY_SET (0xC2001830)
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#define SMC_CMD_FMP_DISK_KEY_CLEAR (0xC2001840)
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#define SMC_CMD_SMU (0xC2001850)
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#define SMC_CMD_FMP_SMU_RESUME (0xC2001860)
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#define SMC_CMD_FMP_SMU_DUMP (0xC2001870)
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#define SMC_CMD_UFS_LOG (0xC2001880)
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/* For FMP/SMU Ctrl */
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#define SMC_CMD_FMP_SECURITY (0xC2001810)
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#define SMC_CMD_FMP_DISK_KEY_STORED (0xC2001820)
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#define SMC_CMD_FMP_DISK_KEY_SET (0xC2001830)
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#define SMC_CMD_FMP_DISK_KEY_CLEAR (0xC2001840)
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#define SMC_CMD_SMU (0xC2001850)
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#define SMC_CMD_FMP_SMU_RESUME (0xC2001860)
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#define SMC_CMD_FMP_SMU_DUMP (0xC2001870)
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#define SMC_CMD_UFS_LOG (0xC2001880)
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/* Command ID for smc */
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#define SMC_PROTECTION_SET (0x82002010)
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#define SMC_DRM_FW_LOADING (0x82002011)
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#define SMC_DCPP_SUPPORT (0x82002012)
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#define SMC_DRM_SECBUF_PROT (0x82002020)
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#define SMC_DRM_SECBUF_UNPROT (0x82002021)
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#define SMC_DRM_G2D_CMD_DATA (0x8200202d)
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#define SMC_DRM_SECBUF_CFW_PROT (0x82002030)
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#define SMC_DRM_SECBUF_CFW_UNPROT (0x82002031)
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#define SMC_DRM_PPMP_PROT (0x82002110)
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#define SMC_DRM_PPMP_UNPROT (0x82002111)
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#define SMC_DRM_PPMP_MFCFW_PROT (0x82002112)
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#define SMC_DRM_PPMP_MFCFW_UNPROT (0x82002113)
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#define MC_FC_SET_CFW_PROT (0x82002040)
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#define SMC_DRM_SEC_SMMU_INFO (0x820020D0)
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#define MC_FC_DRM_SET_CFW_PROT (0x10000000)
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#define SMC_SRPMB_WSM (0x82003811)
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/* Command ID for seccam */
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#define SMC_SECCAM_SETENV (0x82002130)
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#define SMC_SECCAM_INIT (0x82002131)
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#define SMC_SECCAM_INIT_NSBUF (0x82002134)
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#define SMC_SECCAM_SYSREG_PROT (0x82002132)
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#define SMC_SECCAM_PREPARE (0x82002135)
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#define SMC_SECCAM_UNPREPARE (0x82002136)
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#define SMC_SECCAM_GETSTATUS (0x82002137)
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/* Deprecated */
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#define SMC_DRM_MAKE_PGTABLE (0x81000003)
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#define SMC_DRM_CLEAR_PGTABLE (0x81000004)
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#define SMC_MEM_PROT_SET (0x81000005)
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#define SMC_DRM_SECMEM_INFO (0x81000006)
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#define SMC_DRM_VIDEO_PROC (0x81000007)
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/* Parameter for smc */
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#define SMC_PROTECTION_ENABLE (1)
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#define SMC_PROTECTION_DISABLE (0)
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/* For DTRNG Access */
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#ifdef CONFIG_EXYRNG_USE_CRYPTOMANAGER
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#define SMC_CMD_RANDOM (0x82001012)
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#else
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#define SMC_CMD_RANDOM (0x81000030)
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#endif
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/* For Secure log information */
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#define SMC_CMD_SEC_LOG_INFO (0x82000610)
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/* For connectivity I/F */
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#define SMC_CMD_CONN_IF (0x82000710)
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/* For MMCache flush */
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#define SMC_CMD_MM_CACHE_OPERATION (0x82000720)
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/* MACRO for SMC_CMD_REG */
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#define SMC_REG_CLASS_CP15 (0x0 << 30)
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#define SMC_REG_CLASS_SFR_W (0x1 << 30)
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#define SMC_REG_CLASS_SFR_R (0x3 << 30)
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#define SMC_REG_CLASS_MASK (0x3 << 30)
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#define SMC_REG_ID_SFR_W(ADDR) (SMC_REG_CLASS_SFR_W | ((ADDR) >> 2))
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#define SMC_REG_ID_SFR_R(ADDR) (SMC_REG_CLASS_SFR_R | ((ADDR) >> 2))
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/* op type for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */
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#define OP_TYPE_CORE (0x0)
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#define OP_TYPE_CLUSTER (0x1)
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/* Power State required for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */
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#define SMC_POWERSTATE_SLEEP (0x0)
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#define SMC_POWERSTATE_IDLE (0x1)
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#define SMC_POWERSTATE_SWITCH (0x2)
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/*
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* For SMC CMD for SRPMB
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*/
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#define SMC_SRPMB_WSM (0x82003811)
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/* For DTRNG Access */
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#define HWRNG_INIT (0x0)
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#define HWRNG_EXIT (0x1)
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#define HWRNG_GET_DATA (0x2)
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#define HWRNG_RESUME (0x3)
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/* For CFW group */
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#define CFW_DISP_RW (3)
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#define CFW_VPP0 (5)
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#define CFW_VPP1 (6)
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#define SMC_TZPC_OK (2)
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#define PROT_MFC (0)
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#define PROT_MSCL0 (1)
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#define PROT_MSCL1 (2)
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#define PROT_G0 (3)
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#define PROT_G1 (4)
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#define PROT_VG0 (5)
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#define PROT_GF (6)
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#define PROT_G2 (7)
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#define PROT_G3 (8)
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#define PROT_VGR0 (9)
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#define PROT_VGRF (10)
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#define PROT_WB1 (11)
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#define PROT_G3D (12)
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#define PROT_JPEG (13)
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#define PROT_G2D (14)
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#ifndef __ASSEMBLY__
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/* secure SysMMU SFR access */
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enum sec_sysmmu_sfr_access_t {
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SEC_SMMU_SFR_READ,
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SEC_SMMU_SFR_WRITE,
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};
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/* Return value from DRM LDFW */
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enum drmdrv_result_t {
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DRMDRV_OK = 0x0000,
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/* Error lists for common driver */
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E_DRMDRV_INVALID = 0x1001,
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E_DRMDRV_INVALID_ADDR_ALIGN = 0x1002,
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E_DRMDRV_INVALID_SIZE_ALIGN = 0x1003,
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E_DRMDRV_INVALID_MEMCPY_LENGTH = 0x1004,
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E_DRMDRV_ADDR_OUT_OF_DRAM = 0x1005,
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E_DRMDRV_ADDR_OUT_OF_SECMEM = 0x1006,
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E_DRMDRV_INVALID_ADDR = 0x1007,
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E_DRMDRV_INVALID_SIZE = 0x1008,
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E_DRMDRV_INVALID_CMD = 0x1009,
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E_DRMDRV_ADDR_OVERFLOWED = 0x100A,
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E_DRMDRV_ADDR_OVERLAP_SECOS = 0x100B,
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/* Error lists for TZASC driver */
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E_DRMDRV_TZASC_ALIGN_CHECK = 0x2001,
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E_DRMDRV_TZASC_CONTIG_CHECK = 0x2002,
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E_DRMDRV_TZASC_GET_ORDER = 0x2003,
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E_DRMDRV_TZASC_INVALID_INDEX = 0x2004,
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E_DRMDRV_TZASC_INVALID_ENABLED = 0x2005,
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E_DRMDRV_TZASC_NOT_PROTECTED = 0x2006,
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/* Erorr lists for media driver */
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E_DRMDRV_MEDIA_CHECK_POWER = 0x3001,
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E_DRMDRV_MEDIA_CHECK_CLOCK = 0x3002,
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E_DRMDRV_MEDIA_CHECK_SMMU_CLOCK = 0x3003,
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E_DRMDRV_MEDIA_CHECK_SMMU_ENABLED = 0x3004,
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E_DRMDRV_WB_CHECK_FAILED = 0x3005,
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E_DRMDRV_HDMI_WITH_NO_HDCP_FAILED = 0x3006,
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E_DRMDRV_MSCL_LOCAL_PATH_FAILED = 0x3007,
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E_DRMDRV_HDMI_POWER_OFF = 0x3008,
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E_DRMDRV_HDMI_CLOCK_OFF = 0x3009,
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E_DRMDRV_INVALID_REFCOUNT = 0x300A,
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/* Error lists for g2d driver */
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E_DRMDRV_G2D_INVALID_PARAM = 0x4001,
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E_DRMDRV_G2D_BLIT_TIMEOUT = 0x4002,
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/* Error lists for RTC driver */
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E_DRMDRV_GET_RTC_TIME = 0x5001,
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E_DRMDRV_SET_RTC_TIME = 0x5002,
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E_DRMDRV_GET_RTC_TICK_TIME = 0x5003,
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E_DRMDRV_SET_RTC_TICK_TIME = 0x5004,
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/* Error lists for CFW driver */
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E_DRMDRV_CFW_ERROR = 0x6001,
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E_DRMDRV_CFW_BUFFER_LIST_FULL = 0x6002,
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E_DRMDRV_CFW_NOT_PROTECTED_BUFFER = 0x6003,
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E_DRMDRV_CFW_INVALID_DEV_ARG = 0x6004,
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E_DRMDRV_CFW_INIT_FAIL = 0x6005,
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E_DRMDRV_CFW_PROT_FAIL = 0x6006,
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E_DRMDRV_CFW_ENABLED_ALREADY = 0x6007,
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E_DRMDRV_CFW_NOT_EXIST_IN_CFW_BUFF_LIST = 0x6008,
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E_DRMDRV_CFW_DUPLICATED_BUFFER = 0x6009,
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E_DRMDRV_CFW_BUFFER_IS_OVERLAPPED = 0x600A,
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/* Error lists for Secure Buffer */
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E_DRMDRV_DUPLICATED_BUFFER = 0x7001,
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E_DRMDRV_BUFFER_LIST_FULL = 0x7002,
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E_DRMDRV_NOT_EXIST_IN_SEC_BUFFER_LIST = 0x7003,
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E_DRMDRV_OVERLAP_RESERVED_ASP_REGION = 0x7004,
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E_DRMDRV_INVALID_BUFFER_TYPE = 0x7005,
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/* Error lists for MFC FW */
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E_DRMDRV_MFC_FW_IS_NOT_PROTECTED = 0x8001,
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E_DRMDRV_MFC_FW_ARG_IS_NULL = 0x8002,
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E_DRMDRV_MFC_FW_INVALID_SIZE = 0x8003,
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};
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extern int __exynos_smc(unsigned long cmd, unsigned long arg1, unsigned long arg2, unsigned long arg3);
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extern int exynos_smc(unsigned long cmd, unsigned long arg1, unsigned long arg2, unsigned long arg3);
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extern int exynos_smc_readsfr(unsigned long addr, unsigned long* val);
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#endif
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#endif /* __SMC_H__ */
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