86 lines
2.2 KiB
Plaintext
Executable File
86 lines
2.2 KiB
Plaintext
Executable File
Broadcom BCM63138 DSL System-on-a-Chip device tree bindings
|
|
-----------------------------------------------------------
|
|
|
|
Boards compatible with the BCM63138 DSL System-on-a-Chip should have the
|
|
following properties:
|
|
|
|
Required root node property:
|
|
|
|
compatible: should be "brcm,bcm63138"
|
|
|
|
An optional Boot lookup table Device Tree node is required for secondary CPU
|
|
initialization as well as a 'resets' phandle to the correct PMB controller as
|
|
defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an
|
|
'enable-method' property.
|
|
|
|
Required properties for the Boot lookup table node:
|
|
- compatible: should be "brcm,bcm63138-bootlut"
|
|
- reg: register base address and length for the Boot Lookup table
|
|
|
|
Optional properties for the primary CPU node:
|
|
- enable-method: should be "brcm,bcm63138"
|
|
|
|
Optional properties for the secondary CPU node:
|
|
- enable-method: should be "brcm,bcm63138"
|
|
- resets: phandle to the relevant PMB controller, one integer indicating the internal
|
|
bus number, and a second integer indicating the address of the CPU in the PMB
|
|
internal bus number.
|
|
|
|
Example:
|
|
|
|
cpus {
|
|
cpu@0 {
|
|
compatible = "arm,cotex-a9";
|
|
reg = <0>;
|
|
...
|
|
enable-method = "brcm,bcm63138";
|
|
};
|
|
|
|
cpu@1 {
|
|
compatible = "arm,cortex-a9";
|
|
reg = <1>;
|
|
...
|
|
enable-method = "brcm,bcm63138";
|
|
resets = <&pmb0 4 1>;
|
|
};
|
|
};
|
|
|
|
bootlut: bootlut@8000 {
|
|
compatible = "brcm,bcm63138-bootlut";
|
|
reg = <0x8000 0x50>;
|
|
};
|
|
|
|
=======
|
|
reboot
|
|
------
|
|
Two nodes are required for software reboot: a timer node and a syscon-reboot node.
|
|
|
|
Timer node:
|
|
|
|
- compatible: Must be "brcm,bcm6328-timer", "syscon"
|
|
- reg: Register base address and length
|
|
|
|
Syscon reboot node:
|
|
|
|
See Documentation/devicetree/bindings/power/reset/syscon-reboot.txt for the
|
|
detailed list of properties, the two values defined below are specific to the
|
|
BCM6328-style timer:
|
|
|
|
- offset: Should be 0x34 to denote the offset of the TIMER_WD_TIMER_RESET register
|
|
from the beginning of the TIMER block
|
|
- mask: Should be 1 for the SoftRst bit.
|
|
|
|
Example:
|
|
|
|
timer: timer@80 {
|
|
compatible = "brcm,bcm6328-timer", "syscon";
|
|
reg = <0x80 0x3c>;
|
|
};
|
|
|
|
reboot {
|
|
compatible = "syscon-reboot";
|
|
regmap = <&timer>;
|
|
offset = <0x34>;
|
|
mask = <0x1>;
|
|
};
|