213 lines
6.7 KiB
C
213 lines
6.7 KiB
C
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/*
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* internal functions for TFA layer (not shared with SRV and HAL layer!)
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*/
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#ifndef __TFA_INTERNAL_H__
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#define __TFA_INTERNAL_H__
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#include "tfa_dsp_fw.h"
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#include <sound/tfa_ext.h>
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#include "tfa_service.h"
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#include "config.h"
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#if __GNUC__ >= 4
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#define TFA_INTERNAL __attribute__((visibility("hidden")))
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#else
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#define TFA_INTERNAL
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#endif
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#define TFA98XX_GENERIC_SLAVE_ADDRESS 0x1C
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#define MAX_HANDLES 4
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enum feature_support {
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SUPPORT_NOT_SET, /* the default is not set yet, so = 0 */
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SUPPORT_NO,
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SUPPORT_YES
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};
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enum instream_state {
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BIT_PSTREAM = 1, /* b0 */
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BIT_CSTREAM = 2, /* b1 */
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BIT_SAMSTREAM = 4 /* b2 */
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};
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#if defined(TFADSP_DSP_BUFFER_POOL)
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enum pool_control {
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POOL_NOT_SUPPORT,
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POOL_ALLOC,
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POOL_FREE,
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POOL_GET,
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POOL_RETURN,
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POOL_MAX_CONTROL
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};
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#define POOL_MAX_INDEX 6
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struct tfa98xx_buffer_pool {
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int size;
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unsigned char in_use;
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void *pool;
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};
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#endif /* TFADSP_DSP_BUFFER_POOL */
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/*
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* tfa98xx control structure gathers data related to a single control
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* (a 'control' can be related to an interface file)
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* Some operations can be flagged as deferrable, meaning that they can be
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* scheduled for later execution. This can be used for operations that
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* require the i2s clock to run, and if it is not available while applying
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* the control.
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* The Some operations can as well be cache-able (supposedly they are the same
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* operations as the deferrable). Cache-able means that the status or
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* register value may not be accesable while accessing the control. Caching
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* allows to get the last programmed value.
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*
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* Fields:
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* deferrable:
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* true: means the action or register accces can be run later (for example
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* when an active i2s clock will be available).
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* false: meams the operation can be applied immediately
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* triggered: true if the deferred operation was triggered and is scheduled
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* to run later
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* wr_value: the value to write in the deferred action (if applicable)
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* rd_value: the cached value to report on a cached read (if applicable)
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* rd_valid: true if the rd_value was initialized (and can be reported)
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*/
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struct tfa98xx_control {
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bool deferrable;
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bool triggered;
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int wr_value;
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int rd_value;
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bool rd_valid;
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};
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struct tfa98xx_controls {
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struct tfa98xx_control otc;
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struct tfa98xx_control mtpex;
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struct tfa98xx_control calib;
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/* struct tfa98xx_control r; */
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/* struct tfa98xx_control temp; */
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};
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typedef enum tfa98xx_error (*dsp_msg_t)(tfa98xx_handle_t handle,
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int length, const char *buf);
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typedef enum tfa98xx_error (*dsp_msg_read_t)(tfa98xx_handle_t handle,
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int length, unsigned char *bytes);
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typedef enum tfa98xx_error (*reg_read_t)(tfa98xx_handle_t handle,
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unsigned char subaddress, unsigned short *value);
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typedef enum tfa98xx_error (*reg_write_t)(tfa98xx_handle_t handle,
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unsigned char subaddress, unsigned short value);
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typedef enum tfa98xx_error (*mem_read_t)(tfa98xx_handle_t handle,
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unsigned int start_offset, int num_words, int *p_values);
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typedef enum tfa98xx_error (*mem_write_t)(tfa98xx_handle_t handle,
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unsigned short address, int value, int memtype);
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struct tfa_device_ops {
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enum tfa98xx_error (*tfa_init)(tfa98xx_handle_t dev_idx);
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enum tfa98xx_error (*tfa_dsp_reset)
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(tfa98xx_handle_t dev_idx, int state);
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enum tfa98xx_error (*tfa_dsp_system_stable)
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(tfa98xx_handle_t handle, int *ready);
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enum tfa98xx_error (*tfa_dsp_write_tables)
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(tfa98xx_handle_t dev_idx, int sample_rate);
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enum tfa98xx_error (*tfa_set_boost_trip_level)
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(tfa98xx_handle_t handle, int Re25C);
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dsp_msg_t dsp_msg;
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dsp_msg_read_t dsp_msg_read;
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reg_read_t reg_read;
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reg_write_t reg_write;
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mem_read_t mem_read;
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mem_write_t mem_write;
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struct tfa98xx_controls controls;
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};
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struct tfa98xx_handle_private {
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int in_use;
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int buffer_size;
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unsigned char slave_address;
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unsigned short rev;
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unsigned char tfa_family; /* tfa1/tfa2 */
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enum feature_support support_drc;
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enum feature_support support_framework;
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enum feature_support support_saam;
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int sw_feature_bits[2]; /* cached feature bits data */
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int hw_feature_bits; /* cached feature bits data */
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int profile; /* cached active profile */
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int vstep[2]; /* cached active vsteps */
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/* TODO add? unsigned char rev_major; */
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/* void tfa98xx_rev(int *major, int *minor, int *revision) */
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/* unsigned char rev_minor; */
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/* unsigned char rev_build; */
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unsigned char spkr_count;
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unsigned char spkr_select;
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unsigned char support_tcoef;
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enum tfa98xx_dai_bitmap daimap;
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int mohm[3]; /* > calibration values in milli ohms -1 is error */
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int temp; /* > calibration temperature in degC */
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struct tfa_device_ops dev_ops;
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uint16_t interrupt_enable[3];
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uint16_t interrupt_status[3];
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int ext_dsp; /* respond to external DSP: 0:none, 1:cold, 2:warm */
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int is_cold; /* respond to MANSTATE, before tfa_run_speaker_boost */
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enum tfadsp_event_en tfadsp_event;
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int default_boost_trip_level;
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int saam_use_case;
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/* 0: not in use, 1: RaM / SaM only, 2: bidirectional */
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int stream_state;
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/* b0: pstream (Rx), b1: cstream (Tx), b2: samstream (SaaM) */
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#if defined(TFA_BLACKBOX_LOGGING)
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configure_log_t log_set_cb;
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update_log_t log_get_cb;
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#endif
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#if defined(TFADSP_DSP_BUFFER_POOL)
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struct tfa98xx_buffer_pool buf_pool[POOL_MAX_INDEX];
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#endif
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};
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/* tfa98xx: tfa_device_ops */
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#if (defined(USE_TFA9872) || defined(TFA98XX_FULL))
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void tfa9872_ops(struct tfa_device_ops *ops);
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#endif
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#if (defined(USE_TFA9912) || defined(TFA98XX_FULL))
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void tfa9912_ops(struct tfa_device_ops *ops);
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#endif
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#if (defined(USE_TFA9888) || defined(TFA98XX_FULL))
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void tfa9888_ops(struct tfa_device_ops *ops);
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#endif
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#if (defined(USE_TFA9891) || defined(TFA98XX_FULL))
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void tfa9891_ops(struct tfa_device_ops *ops);
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#endif
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#if (defined(USE_TFA9897) || defined(TFA98XX_FULL))
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void tfa9897_ops(struct tfa_device_ops *ops);
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#endif
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#if (defined(USE_TFA9896) || defined(TFA98XX_FULL))
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void tfa9896_ops(struct tfa_device_ops *ops);
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#endif
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#if (defined(USE_TFA9890) || defined(TFA98XX_FULL))
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void tfa9890_ops(struct tfa_device_ops *ops);
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#endif
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#if (defined(USE_TFA9895) || defined(TFA98XX_FULL))
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void tfa9895_ops(struct tfa_device_ops *ops);
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#endif
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/* tfa98xx.c */
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extern TFA_INTERNAL struct tfa98xx_handle_private handles_local[];
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TFA_INTERNAL int tfa98xx_handle_is_open(tfa98xx_handle_t h);
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TFA_INTERNAL enum tfa98xx_error tfa98xx_check_rpc_status
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(tfa98xx_handle_t handle, int *p_rpc_status);
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TFA_INTERNAL enum tfa98xx_error tfa98xx_wait_result
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(tfa98xx_handle_t handle, int waitRetryCount);
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TFA_INTERNAL void tfa98xx_apply_deferred_calibration(tfa98xx_handle_t handle);
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TFA_INTERNAL void tfa98xx_deferred_calibration_status
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(tfa98xx_handle_t handle, int calibrate_done);
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TFA_INTERNAL int print_calibration
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(tfa98xx_handle_t handle, char *str, size_t size);
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#if defined(TFADSP_DSP_BUFFER_POOL)
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TFA_INTERNAL int tfa98xx_buffer_pool_access
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(tfa98xx_handle_t handle, int r_index, size_t g_size, int control);
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#endif
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#endif /* __TFA_INTERNAL_H__ */
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