359 lines
13 KiB
C
359 lines
13 KiB
C
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/****************************************************************************
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*
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* Copyright (c) 2014 - 2016 Samsung Electronics Co., Ltd. All rights reserved
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*
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****************************************************************************/
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/****************************************************************************
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* FILE
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* bsmhcp.h - Bluetooth Shared Memory Host Controller Protocol
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*
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* DESCRIPTION
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* This file specifies the layout of the Bluetooth Shared Memory
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* Host Controller Protocol as described in SC-505753-DD
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*/
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#ifndef __BSMHCP_H__
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#define __BSMHCP_H__
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#define BSMHCP_TRANSFER_RING_CMD_SIZE (8)
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#define BSMHCP_TRANSFER_RING_EVT_SIZE (32)
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#define BSMHCP_TRANSFER_RING_ACL_SIZE (32)
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#define BSMHCP_TRANSFER_RING_AVDTP_SIZE (16)
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#define BSMHCP_TRANSFER_RING_IQ_REPORT_SIZE (8)
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/* Of the buffers in BSMHCP_TRANSFER_RING_ACL_SIZE, reserve a number for ULP
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* operation. */
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#define BSMHCP_TRANSFER_RING_ACL_ULP_RESERVED (4)
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#define BSMHCP_TRANSFER_RING_SCO_SIZE (0)
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#define BSMHCP_TRANSFER_RING_ACL_COUNT (36)
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#define BSMHCP_TRANSFER_RING_TIMING_COUNT (64)
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#define BSMHCP_CMD_EVT_BUFFER_SIZE (258)
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#define BSMHCP_ACL_BUFFER_SIZE (1024)
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#define BSMHCP_IQ_REPORT_BUFFER_SIZE (164)
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#define BSMHCP_ACL_PACKET_SIZE (1021)
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#define BSMHCP_ULP_PACKET_SIZE BSMHCP_ACL_PACKET_SIZE
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#define BSMHCP_SCO_PACKET_SIZE (0)
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#define BSMHCP_DATA_BUFFER_CMD_SIZE \
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BSMHCP_TRANSFER_RING_CMD_SIZE
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#define BSMHCP_DATA_BUFFER_EVT_SIZE \
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BSMHCP_TRANSFER_RING_EVT_SIZE
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#define BSMHCP_DATA_BUFFER_TX_ACL_SIZE \
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(BSMHCP_TRANSFER_RING_ACL_SIZE - 2)
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#define BSMHCP_DATA_BUFFER_RX_ACL_SIZE \
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BSMHCP_TRANSFER_RING_ACL_SIZE
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#define BSMHCP_EVENT_TYPE_NONE (0x00)
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#define BSMHCP_EVENT_TYPE_CONNECTED (0x01)
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#define BSMHCP_EVENT_TYPE_DISCONNECTED (0x02)
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#define BSMHCP_EVENT_TYPE_IQ_REPORT_ENABLED (0x03)
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#define BSMHCP_EVENT_TYPE_IQ_REPORT_DISABLED (0x04)
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#define BSMHCP_ACL_BC_FLAG_BCAST_NON (0x00)
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#define BSMHCP_ACL_BC_FLAG_BCAST_ACTIVE (0x40)
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#define BSMHCP_ACL_BC_FLAG_BCAST_ALL (0x80)
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#define BSMHCP_ACL_BC_FLAG_BCAST_RSVD (0xC0)
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#define BSMHCP_ACL_BC_FLAG_BCAST_MASK (0xC0)
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#define BSMHCP_ACL_PB_FLAG_START_NONFLUSH (0x00)
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#define BSMHCP_ACL_PB_FLAG_CONT (0x10)
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#define BSMHCP_ACL_PB_FLAG_START_FLUSH (0x20)
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#define BSMHCP_ACL_PB_FLAG_RSVD_3 (0x30)
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#define BSMHCP_ACL_PB_FLAG_MASK (0x30)
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#define BSMHCP_ACL_L2CAP_FLAG_NON (0x00)
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#define BSMHCP_ACL_L2CAP_FLAG_END (0x01)
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#define BSMHCP_ACL_L2CAP_FLAG_MASK (0x01)
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#define BSMHCP_SERVICE_BT_STATE_INACTIVE (0x00)
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#define BSMHCP_SERVICE_BT_STATE_ACTIVE (0x01)
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#define BSMHCP_CONTROLLER_STATE_ACTIVE (0x00000001)
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#define BSMHCP_HCI_CONNECTION_HANDLE_LOOPBACK (0x4000)
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#define BSMHCP_ALIGNMENT (32)
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#define BSMHCP_FEATURE_LPA2DP (0x00000001)
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#define BSMHCP_FEATURE_M4_INTERRUPTS (0x00000002)
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#define BSMHCP_FEATURE_FW_INFORMATION (0x00000004)
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#define BSMHCP_FEATURE_AVDTP_TRANSFER_RING (0x00000008)
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#define BSMHCP_CONTROL_START_PANIC (0x10DEAD01)
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#define BSMHCP_CONTROL_STOP_PANIC (0x0201DEAD)
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#define BSMHCP_CONTROL_CONNECTION_PANIC (0xDEAD2002)
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#define BSMHCP_FW_INFO_USER_DEFINED_COUNT (96)
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#define BSMHCP_TIMING_SOURCE_ITIME (0)
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#define BSMHCP_TIMING_SOURCE_ITIME_L1 (1)
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#define BSMHCP_TIMING_SOURCE_RADIO_TX (2)
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#define BSMHCP_TIMING_SOURCE_RADIO_RX (3)
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#define BSMHCP_TIMING_SOURCE_RADIO_LC (4)
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#define BSMHCP_TIMING_SOURCE_COUNT (5)
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#define BSMHCP_INCREASE_INDEX(index, limit) \
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((index) = ((index) + 1) % (limit))
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/*
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* For a ring where read == write indicates empty this returns false
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* if adding one more would cause it to see the ring as empty
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* read = 3 % 5 = 3
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* v
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* [X,X,_,X,X]
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* ^
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* write = 7 % 5 = 2
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*/
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#define BSMHCP_HAS_ROOM(write, read, limit) \
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((((write) + 1) % (limit)) != (read))
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/*
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* Calculate the how many times you could increase the write pointer
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* without causing them to be seen as empty
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* read = 3 % 5 = 3
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* v
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* [X,_,_,X,X]
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* ^
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* write = 6 % 5 = 1
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*
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* BSMHCP_AMOUNT_FREE(6,3,5) == BSMHCP_AMOUNT_FREE(1,3,5) == 1
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* You can add one more element before BSMHCP_HAS_ROOM would return false
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*/
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#define BSMHCP_AMOUNT_FREE(write, read, limit) \
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(((read) - (write + 1)) % (limit))
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#define BSMHCP_USED_ENTRIES(write, read, limit) \
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((write) >= (read) ? (write - read) : (limit - read + write))
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struct BSMHCP_TD_CONTROL {
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uint16_t length;
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uint8_t data[BSMHCP_CMD_EVT_BUFFER_SIZE];
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};
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struct BSMHCP_TD_HCI_EVT {
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uint16_t length;
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uint16_t hci_connection_handle;
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uint16_t event_type;
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uint8_t data[BSMHCP_CMD_EVT_BUFFER_SIZE];
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};
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struct BSMHCP_TD_ACL_RX {
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uint16_t hci_connection_handle;
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uint16_t length;
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uint8_t broadcast_flag;
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uint8_t packet_boundary;
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uint8_t disconnected;
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uint8_t reserved;
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uint8_t data[BSMHCP_ACL_BUFFER_SIZE];
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};
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struct BSMHCP_TD_ACL_TX_DATA {
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uint16_t length;
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uint8_t buffer_index;
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uint8_t flags;
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uint16_t hci_connection_handle;
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uint16_t l2cap_cid;
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};
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struct BSMHCP_TD_ACL_TX_FREE {
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uint8_t buffer_index;
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uint8_t reserved;
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uint16_t hci_connection_handle;
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};
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struct BSMHCP_TD_AVDTP {
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uint32_t flags;
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uint16_t l2cap_cid;
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uint16_t hci_connection_handle;
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uint32_t reserved;
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};
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struct BSMHCP_ACL_TR_DRV_INDEX {
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uint32_t read_free;
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uint32_t write_data;
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};
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struct BSMHCP_ACL_TR_CTRL_INDEX {
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uint32_t read_data;
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uint32_t write_free;
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};
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struct BSMHCP_INDEX {
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uint32_t read;
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uint32_t write;
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};
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struct BSMHCP_TIMING_PACKET {
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uint16_t source;
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uint16_t sequence_number;
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uint32_t interrupt_enter;
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uint32_t critical_section_enter;
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uint32_t time[4];
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uint32_t critical_section_leave;
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uint32_t interrupt_leave;
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};
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struct BSMHCP_FW_INFO {
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uint32_t r4_from_ap_interrupt_count;
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uint32_t m4_from_ap_interrupt_count;
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uint32_t r4_to_ap_interrupt_count;
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uint32_t m4_to_ap_interrupt_count;
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uint32_t bt_deep_sleep_time_total;
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uint32_t bt_deep_sleep_wakeup_duration;
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uint32_t sched_n_messages;
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uint32_t user_defined_count;
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uint32_t user_defined[BSMHCP_FW_INFO_USER_DEFINED_COUNT];
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};
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struct BSMHCP_TD_IQ_REPORTING_EVT {
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uint8_t subevent_code;
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uint8_t packet_status;
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uint16_t connection_handle;
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uint16_t sync_handle;
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uint8_t rx_phy;
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uint8_t channel_index;
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int16_t rssi;
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uint8_t rssi_antenna_id;
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uint8_t cte_type;
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uint8_t slot_durations;
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uint8_t sample_count;
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uint16_t event_count;
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uint8_t data[BSMHCP_IQ_REPORT_BUFFER_SIZE];
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};
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struct BSMHCP_HEADER {
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/* AP RW - M4/R4 RO - 64 octets */
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uint32_t magic_value; /* 0x00 */
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uint16_t ap_to_fg_m4_int_src; /* 0x04 */
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uint8_t service_request; /* 0x06 */
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uint8_t reserved1; /* 0x07 */
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uint32_t acl_buffer_size; /* 0x08 */
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uint32_t cmd_evt_buffer_size; /* 0x0C */
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uint32_t acl_tx_buffers; /* 0x10 */
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uint16_t ap_to_bg_int_src; /* 0x14 */
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uint16_t ap_to_fg_int_src; /* 0x16 */
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uint16_t bg_to_ap_int_src; /* 0x18 */
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uint16_t fg_to_ap_int_src; /* 0x1A */
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uint32_t mailbox_offset; /* 0x1C */
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uint32_t reserved1_u32; /* 0x20 */
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uint32_t mailbox_hci_cmd_write; /* 0x24 */
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uint32_t mailbox_hci_evt_read; /* 0x28 */
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uint32_t mailbox_acl_tx_write; /* 0x2C */
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uint32_t mailbox_acl_free_read; /* 0x30 */
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uint32_t mailbox_acl_rx_read; /* 0x34 */
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uint32_t abox_offset; /* 0x38 */
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uint32_t abox_length; /* 0x3C */
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/* AP RO - R4 RW - M4 NA - 32 octets */
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uint16_t panic_deathbed_confession; /* 0x40 */
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uint16_t panic_diatribe_value; /* 0x42 */
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uint32_t mailbox_hci_cmd_read; /* 0x44 */
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uint32_t mailbox_hci_evt_write; /* 0x48 */
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uint32_t controller_flags; /* 0x4C */
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uint32_t firmware_features; /* 0x50 */
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uint16_t reserved_u16; /* 0x54 */
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uint8_t service_state; /* 0x56 */
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uint8_t reserved_u8; /* 0x57 */
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uint32_t reserved4_u32; /* 0x58 */
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uint32_t mailbox_avdtp_read; /* 0x5C */
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/* AP RO - R4 NA - M4 RW - 32 octets */
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uint32_t mailbox_acl_tx_read; /* 0x60 */
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uint32_t mailbox_acl_free_write; /* 0x64 */
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uint32_t mailbox_acl_rx_write; /* 0x68 */
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uint32_t mailbox_timing_write; /* 0x6C */
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uint32_t mailbox_iq_report_write; /* 0x70 */
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uint8_t reserved4[0x0C]; /* 0x74 */
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/* AP RO - R4/M4 RW - 32 octets */
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uint32_t reserved6_u32; /* 0x80 */
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uint8_t reserved5[0x1C]; /* 0x84 */
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/* AP RW - M4/R4 RO */
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uint32_t mailbox_timing_read; /* 0xA0 */
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uint32_t mailbox_avdtp_write; /* 0xA4 */
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uint32_t mailbox_iq_report_read; /* 0xA8 */
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uint32_t reserved9_u32; /* 0xAC */
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uint32_t reserved10_u32; /* 0xB0 */
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uint32_t reserved11_u32; /* 0xB4 */
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uint32_t reserved12_u32; /* 0xB8 */
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uint16_t info_ap_to_bg_int_src; /* 0xBC */
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uint16_t info_bg_to_ap_int_src; /* 0xBE */
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uint32_t btlog_enables0_low; /* 0xC0 */
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uint32_t firmware_control; /* 0xC4 */
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uint32_t reserved13_u32; /* 0xC8 */
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uint32_t btlog_enables0_high; /* 0xCC */
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uint32_t btlog_enables1_low; /* 0xD0 */
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uint32_t btlog_enables1_high; /* 0xD4 */
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uint8_t reserved6[0x14]; /* 0xD8 */
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/* Obsolete region - not used */
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uint32_t smm_debug_read; /* 0xEC */
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uint32_t smm_debug_write; /* 0xF0 */
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uint32_t smm_exception; /* 0xF4 */
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uint32_t avdtp_detect_stream_id; /* 0xF8 */
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uint32_t smm_int_ready; /* 0xFE */
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};
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struct BSMHCP_PROTOCOL {
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/* header offset: 0x00000000 */
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volatile struct BSMHCP_HEADER header;
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/* from AP */
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struct BSMHCP_TD_CONTROL /* offset: 0x00000100 */
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hci_cmd_transfer_ring[BSMHCP_TRANSFER_RING_CMD_SIZE];
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/* AVDTP detection */
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struct BSMHCP_TD_AVDTP /* offset: 0x00000920 */
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avdtp_transfer_ring[BSMHCP_TRANSFER_RING_AVDTP_SIZE];
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uint8_t /* offset: 0x000009E0 */
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to_air_reserved[0x1FC0];
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struct BSMHCP_TD_ACL_TX_DATA /* offset: 0x000029A0 */
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acl_tx_data_transfer_ring[BSMHCP_TRANSFER_RING_ACL_SIZE];
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uint8_t /* offset: 0x00002AA0 */
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acl_tx_buffer[BSMHCP_DATA_BUFFER_TX_ACL_SIZE]
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[BSMHCP_ACL_BUFFER_SIZE];
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|
|
|
||
|
|
/* Padding used to ensure minimum 32 octets between sections */
|
||
|
|
uint8_t reserved[0x20]; /* offset: 0x0000A2A0 */
|
||
|
|
|
||
|
|
/* to AP */
|
||
|
|
struct BSMHCP_TD_HCI_EVT /* offset: 0x0000A2C0 */
|
||
|
|
hci_evt_transfer_ring[BSMHCP_TRANSFER_RING_EVT_SIZE];
|
||
|
|
|
||
|
|
struct BSMHCP_TIMING_PACKET /* offset: 0x0000C3C0 */
|
||
|
|
timing_transfer_ring[BSMHCP_TRANSFER_RING_TIMING_COUNT];
|
||
|
|
|
||
|
|
struct BSMHCP_FW_INFO /* offset: 0x0000CCC0 */
|
||
|
|
information;
|
||
|
|
|
||
|
|
uint8_t /* offset: 0x0000CCC0 + sizoef(struct BSMHCP_FW_INFO) */
|
||
|
|
from_air_reserved[0x11E0 - sizeof(struct BSMHCP_FW_INFO)];
|
||
|
|
|
||
|
|
struct BSMHCP_TD_IQ_REPORTING_EVT /* offset: 0x0000DEA0 */
|
||
|
|
iq_reporting_transfer_ring[BSMHCP_TRANSFER_RING_IQ_REPORT_SIZE];
|
||
|
|
|
||
|
|
struct BSMHCP_TD_ACL_RX /* offset: 0x0000E440 */
|
||
|
|
acl_rx_transfer_ring[BSMHCP_TRANSFER_RING_ACL_SIZE];
|
||
|
|
|
||
|
|
struct BSMHCP_TD_ACL_TX_FREE /* offset: 0x00016540 */
|
||
|
|
acl_tx_free_transfer_ring[BSMHCP_TRANSFER_RING_ACL_SIZE];
|
||
|
|
};
|
||
|
|
|
||
|
|
#define BSMHCP_TD_ACL_RX_CONTROL_SIZE \
|
||
|
|
(sizeof(struct BSMHCP_TD_ACL_RX) - BSMHCP_ACL_BUFFER_SIZE)
|
||
|
|
|
||
|
|
#define BSMHCP_PROTOCOL_MAGICVALUE \
|
||
|
|
((BSMHCP_ACL_BUFFER_SIZE | BSMHCP_CMD_EVT_BUFFER_SIZE | \
|
||
|
|
(offsetof(struct BSMHCP_PROTOCOL, acl_tx_buffer) << 15)) ^ \
|
||
|
|
sizeof(struct BSMHCP_PROTOCOL))
|
||
|
|
|
||
|
|
#endif /* __BSMHCP_H__ */
|