283 lines
6.8 KiB
C
283 lines
6.8 KiB
C
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/*
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* s2mu106-private.h - Voltage regulator driver for the s2mu106
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*
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* Copyright (C) 2020 Samsung Electronics Co.Ltd
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#ifndef __LINUX_MFD_S2MU106_PRIV_H
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#define __LINUX_MFD_S2MU106_PRIV_H
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#include <linux/i2c.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#define MFD_DEV_NAME "s2mu106"
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/* Slave Address for
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Charger
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RGBLED
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Flash LED */
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#define I2C_ADDR_PM (0x3D)
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/*
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* Slave Address for the MFD
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* includes :
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* MUIC, AFC, PM, MST.
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* 1 bit right-shifted.
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*/
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#define I2C_ADDR_7C_SLAVE ((0x7C) >> 1)
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/* Slave Address for
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Haptic
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Haptic Boost */
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#define I2C_ADDR_HAPTIC (0x3A)
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/* Master Register Addr */
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#define S2MU106_REG_IPINT 0x00
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#define S2MU106_REG_IPINT_MASK 0x07
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#define S2MU106_REG_PMICID 0xF5
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#define S2MU106_REG_PMICID_MASK 0x0F
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#define S2MU106_REG_INVALID 0xFF
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/* IRQ */
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enum s2mu106_irq_source {
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#if defined(CONFIG_CHARGER_S2MU106)
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CHG_INT1,
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CHG_INT2,
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CHG_INT3,
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#endif
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#if defined(CONFIG_LEDS_S2MU106_FLASH)
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FLED_INT1,
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FLED_INT2,
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#endif
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#if defined(CONFIG_HV_MUIC_S2MU106_AFC)
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AFC_INT,
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#endif
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#if defined(CONFIG_MUIC_S2MU106)
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MUIC_INT1,
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MUIC_INT2,
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#endif
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#if defined(CONFIG_PM_S2MU106)
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PM_VALUP1,
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PM_VALUP2,
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PM_INT1,
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PM_INT2,
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#endif
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#if defined(CONFIG_MST_S2MU106)
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MST_INT,
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#endif
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#if defined(CONFIG_VIBRATOR_S2MU106)
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HAPTIC_INT,
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#endif
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#if defined(CONFIG_REGULATOR_S2MU106)
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HBST_INT,
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#endif
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S2MU106_IRQ_GROUP_NR,
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};
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#define S2MU106_NUM_IRQ_CHG_REGS 3
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#define S2MU106_NUM_IRQ_LED_REGS 2
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#define S2MU106_NUM_IRQ_AFC_REGS 1
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#define S2MU106_NUM_IRQ_MUIC_REGS 2
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#define S2MU106_NUM_IRQ_PM_REGS 4
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#define S2MU106_NUM_IRQ_MST_REGS 1
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#define S2MU106_NUM_IRQ_HAPTIC_REGS 1
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#define S2MU106_NUM_IRQ_HBST_REGS 1
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#define S2MU106_IRQSRC_PM (1 << 0)
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#define S2MU106_IRQSRC_AFC (1 << 1)
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#define S2MU106_IRQSRC_MUIC (1 << 2)
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#define S2MU106_IRQSRC_MST (1 << 3)
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#define S2MU106_IRQSRC_HBST (1 << 4)
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#define S2MU106_IRQSRC_FLED (1 << 5)
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#define S2MU106_IRQSRC_CHG (1 << 6)
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#define S2MU106_IRQSRC_HAPTIC (1 << 7)
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enum s2mu106_irq {
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#if defined(CONFIG_CHARGER_S2MU106)
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S2MU106_CHG1_IRQ_SYS,
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S2MU106_CHG1_IRQ_CV,
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S2MU106_CHG1_IRQ_CHG_Fault,
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S2MU106_CHG1_IRQ_CHG_RSTART,
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S2MU106_CHG1_IRQ_DONE,
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S2MU106_CHG1_IRQ_TOP_OFF,
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S2MU106_CHG1_IRQ_WCIN,
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S2MU106_CHG1_IRQ_CHGIN,
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S2MU106_CHG2_IRQ_ICR,
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S2MU106_CHG2_IRQ_IVR,
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S2MU106_CHG2_IRQ_AICL,
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S2MU106_CHG2_IRQ_DET_BAT,
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S2MU106_CHG2_IRQ_BAT,
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S2MU106_CHG2_IRQ_BATN_OPEN,
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S2MU106_CHG2_IRQ_BATP_OPEN,
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S2MU106_CHG2_IRQ_QBAT_OFF,
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S2MU106_CHG3_IRQ_BST,
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S2MU106_CHG3_IRQ_TX,
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S2MU106_CHG3_IRQ_OTG,
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S2MU106_CHG3_IRQ_VBUS_Short,
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S2MU106_CHG3_IRQ_MaxDuty,
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S2MU106_CHG3_IRQ_PEdone,
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S2MU106_CHG3_IRQ_BAT_Contact_CK_Done,
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#endif
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#if defined(CONFIG_LEDS_S2MU106_FLASH)
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S2MU106_FLED1_IRQ_C2F_Vbyp_ovp_prot,
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S2MU106_FLED1_IRQ_C2F_Vbyp_OK_Warning,
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S2MU106_FLED1_IRQ_OPEN_CH3,
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S2MU106_FLED1_IRQ_OPEN_CH2,
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S2MU106_FLED1_IRQ_OPEN_CH1,
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S2MU106_FLED1_IRQ_SHORT_CH3,
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S2MU106_FLED1_IRQ_SHORT_CH2,
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S2MU106_FLED1_IRQ_SHORT_CH1,
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S2MU106_FLED2_IRQ_CH3_ON,
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S2MU106_FLED2_IRQ_CH2_ON,
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S2MU106_FLED2_IRQ_CH1_ON,
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S2MU106_FLED2_IRQ_TORCH_ON,
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S2MU106_FLED2_IRQ_LED_ON_TA_Detach,
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#endif
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#if defined(CONFIG_HV_MUIC_S2MU106_AFC)
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S2MU106_AFC_IRQ_VbADC,
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S2MU106_AFC_IRQ_VDNMon,
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S2MU106_AFC_IRQ_DNRes,
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S2MU106_AFC_IRQ_MPNack,
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S2MU106_AFC_IRQ_MRxBufOw,
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S2MU106_AFC_IRQ_MRxTrf,
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S2MU106_AFC_IRQ_MRxPerr,
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S2MU106_AFC_IRQ_MRxRdy,
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#endif
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#if defined(CONFIG_MUIC_S2MU106)
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S2MU106_MUIC_IRQ1_DETACH,
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S2MU106_MUIC_IRQ1_ATTATCH,
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S2MU106_MUIC_IRQ1_KP,
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S2MU106_MUIC_IRQ1_LKP,
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S2MU106_MUIC_IRQ1_LKR,
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S2MU106_MUIC_IRQ1_RID_CHG,
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S2MU106_MUIC_IRQ1_USB_Killer,
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S2MU106_MUIC_IRQ1_WAKE_UP,
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S2MU106_MUIC_IRQ2_VBUS_ON,
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S2MU106_MUIC_IRQ2_RSVD_ATTACH,
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S2MU106_MUIC_IRQ2_ADC_CHANGE,
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S2MU106_MUIC_IRQ2_STUCK,
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S2MU106_MUIC_IRQ2_STUCKRCV,
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S2MU106_MUIC_IRQ2_MHDL,
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S2MU106_MUIC_IRQ2_AV_CHARGE,
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S2MU106_MUIC_IRQ2_VBUS_OFF,
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#endif
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#if defined(CONFIG_PM_S2MU106)
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S2MU106_PM_VALUP1_VCC2UP,
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S2MU106_PM_VALUP1_VGPADCUP,
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S2MU106_PM_VALUP1_VCC1UP,
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S2MU106_PM_VALUP1_VBATAUP,
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S2MU106_PM_VALUP1_VSYSAUP,
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S2MU106_PM_VALUP1_VBYPUP,
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S2MU106_PM_VALUP1_VWCINUP,
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S2MU106_PM_VALUP1_VCHGINUP,
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S2MU106_PM_VALUP2_ITXUP,
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S2MU106_PM_VALUP2_IOTGUP,
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S2MU106_PM_VALUP2_IWCINUP,
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S2MU106_PM_VALUP2_ICHGINUP,
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S2MU106_PM_IRQ1_VCC2UP,
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S2MU106_PM_IRQ1_VGPADCUP,
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S2MU106_PM_IRQ1_VCC1UP,
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S2MU106_PM_IRQ1_VBATAUP,
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S2MU106_PM_IRQ1_VSYSAUP,
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S2MU106_PM_IRQ1_VBYPUP,
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S2MU106_PM_IRQ1_VWCINUP,
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S2MU106_PM_IRQ1_VCHGINUP,
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S2MU106_PM_IRQ2_ITXUP,
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S2MU106_PM_IRQ2_IOTGUP,
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S2MU106_PM_IRQ2_IWCINUP,
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S2MU106_PM_IRQ2_ICHGINUP,
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#endif
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#if defined(CONFIG_MST_S2MU106)
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S2MU106_MST_IRQ_SHORT,
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S2MU106_MST_IRQ_OCP,
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S2MU106_MST_IRQ_EN_OVL,
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S2MU106_MST_IRQ_DONE,
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S2MU106_MST_IRQ_EN,
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#endif
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#if defined(CONFIG_VIBRATOR_S2MU106)
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S2MU106_HAPTIC_IRQ_OCP,
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#endif
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#if defined(CONFIG_REGULATOR_S2MU106)
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S2MU106_HBST_IRQ_OFF,
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S2MU106_HBST_IRQ_ON,
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S2MU106_HBST_IRQ_SCP,
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#endif
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S2MU106_IRQ_NR,
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};
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struct s2mu106_platform_data {
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/* IRQ */
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int irq_base;
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int irq_gpio;
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bool wakeup;
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};
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struct s2mu106_dev {
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struct device *dev;
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struct i2c_client *i2c; /* Slave addr = 0x3D */
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struct i2c_client *muic; /* Slave addr = 0x3E */
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struct i2c_client *haptic; /* Slave addr = 0x3A */
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struct mutex i2c_lock;
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int type;
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int irq;
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int irq_base;
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int irq_gpio;
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bool wakeup;
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bool change_irq_mask;
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struct mutex irqlock;
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int irq_masks_cur[S2MU106_IRQ_GROUP_NR];
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int irq_masks_cache[S2MU106_IRQ_GROUP_NR];
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/* pmic VER/REV register */
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u8 pmic_rev; /* pmic Rev */
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u8 pmic_ver; /* pmic version */
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struct s2mu106_platform_data *pdata;
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};
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enum s2mu106_types {
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TYPE_S2MU106,
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};
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extern int s2mu106_irq_init(struct s2mu106_dev *s2mu106);
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extern void s2mu106_irq_exit(struct s2mu106_dev *s2mu106);
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/* s2mu106 shared i2c API function */
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extern int s2mu106_read_reg(struct i2c_client *i2c, u8 reg, u8 *dest);
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extern int s2mu106_bulk_read(struct i2c_client *i2c, u8 reg, int count,
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u8 *buf);
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extern int s2mu106_write_reg(struct i2c_client *i2c, u8 reg, u8 value);
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extern int s2mu106_bulk_write(struct i2c_client *i2c, u8 reg, int count,
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u8 *buf);
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extern int s2mu106_write_word(struct i2c_client *i2c, u8 reg, u16 value);
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extern int s2mu106_read_word(struct i2c_client *i2c, u8 reg);
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extern int s2mu106_update_reg(struct i2c_client *i2c, u8 reg, u8 val, u8 mask);
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#endif /* __LINUX_MFD_S2MU106_PRIV_H */
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