169 lines
4.2 KiB
C
169 lines
4.2 KiB
C
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#ifndef __EXYNOS_HIU_H__
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#define __EXYNOS_HIU_H__
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#include <linux/cpufreq.h>
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#include <linux/interrupt.h>
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/* Function Id to Enable HIU in EL3 */
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#define GCU_BASE (0x1E4C0000)
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/* SR1 write monitoring operation mode */
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#define POLLING_MODE (0)
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#define INTERRUPT_MODE (1)
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/* GCU Control Register */
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#define GCUCTL (0x22C)
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#define HIUINTR_EN_MASK (0x1)
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#define HIUINTR_EN_SHIFT (3)
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#define HIUERR_EN_MASK (0x1)
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#define HIUERR_EN_SHIFT (2)
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/* GCU ERROR Register */
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#define GCUERR (0x26C)
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#define HIUINTR_MASK (0x1)
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#define HIUINTR_SHIFT (3)
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#define HIUERR_MASK (0x1)
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#define HIUERR_SHIFT (2)
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/* HIU Top Level Control 1 Register */
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#define HIUTOPCTL1 (0xE00)
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#define ACTDVFS_MASK (0x3F)
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#define ACTDVFS_SHIFT (24)
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#define HIU_MBOX_RESPONSE_MASK (0x1)
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#define SR1INTR_SHIFT (15)
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#define SR1UXPERR_MASK (1 << 3)
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#define SR1SNERR_MASK (1 << 2)
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#define SR1TIMEOUT_MASK (1 << 1)
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#define SR0RDERR_MASK (1 << 0)
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#define HIU_MBOX_ERR_MASK (0xF)
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#define HIU_MBOX_ERR_SHIFT (11)
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#define ENB_SR1INTR_MASK (0x1)
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#define ENB_SR1INTR_SHIFT (5)
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#define ENB_ERR_INTERRUPTS_MASK (0x1E)
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#define ENB_SR1UXPERR_MASK (0x1)
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#define ENB_SR1UXPERR_SHIFT (4)
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#define ENB_SR1SNERR_MASK (0x1)
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#define ENB_SR1SNERR_SHIFT (3)
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#define ENB_SR1TIMEOUT_MASK (0x1)
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#define ENB_SR1TIMEOUT_SHIFT (2)
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#define ENB_SR0RDERR_MASK (0x1)
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#define ENB_SR0RDERR_SHIFT (1)
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#define ENB_ACPM_COMM_MASK (0x1)
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#define ENB_ACPM_COMM_SHIFT (0)
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/* HIU Top Level Control 2 Register */
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#define HIUTOPCTL2 (0xE04)
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#define SEQNUM_MASK (0x7)
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#define SEQNUM_SHIFT (26)
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#define LIMITDVFS_MASK (0x3F)
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#define LIMITDVFS_SHIFT (14)
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#define REQDVFS_MASK (0x3F)
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#define REQDVFS_SHIFT (8)
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#define REQPBL_MASK (0xFF)
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#define REQPBL_SHIFT (0)
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/* HIU Turbo Boost Control Register */
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#define HIUTBCTL (0xE10)
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#define BOOSTED_MASK (0x1)
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#define BOOSTED_SHIFT (31)
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#define B3_INC_MASK (0x3)
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#define B3_INC_SHIFT (20)
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#define B2_INC_MASK (0x3)
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#define B2_INC_SHIFT (18)
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#define B1_INC_MASK (0x3)
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#define B1_INC_SHIFT (16)
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#define TBDVFS_MASK (0x3F)
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#define TBDVFS_SHIFT (8)
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#define PC_DISABLE_MASK (0x1)
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#define PC_DISABLE_SHIFT (1)
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#define TB_ENB_MASK (0x1)
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#define TB_ENB_SHIFT (0)
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/* HIU Turbo Boost Power State Config Registers */
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#define HIUTBPSCFG_BASE (0xE14)
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#define HIUTBPSCFG_OFFSET (0x4)
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#define HIUTBPSCFG_MASK (0x1 << 31 | 0x7 << 28 | 0xFF << 20 | 0xFFFF << 0x0)
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#define PB_MASK (0x1)
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#define PB_SHIFT (31)
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#define BL_MASK (0x7)
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#define BL_SHIFT (28)
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#define PBL_MASK (0xFF)
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#define PBL_SHIFT (20)
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#define TBPWRTHRESH_INC_MASK (0xFFFF)
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#define TBPWRTHRESH_INC_SHIFT (0x0)
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/* HIU Turbo Boost Power Threshold Register */
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#define HIUTBPWRTHRESH1 (0xE34)
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#define HIUTBPWRTHRESH2 (0xE38)
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#define HIUTBPWRTHRESH3 (0xE3C)
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#define R_MASK (0x3F)
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#define R_SHIFT (24)
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#define MONINTERVAL_MASK (0xF)
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#define MONINTERVAL_SHIFT (20)
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#define TBPWRTHRESH_EXP_MASK (0xF)
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#define TBPWRTHRESH_EXP_SHIFT (16)
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#define TBPWRTHRESH_FRAC_MASK (0xFFFF)
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#define TBPWRTHRESH_FRAC_SHIFT (0)
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struct hiu_stats {
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unsigned int last_level;
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unsigned int *freq_table;
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unsigned long long *time_in_state;
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};
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struct hiu_tasklet_data {
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unsigned int index;
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};
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struct hiu_cfg {
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unsigned int power_borrowed;
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unsigned int boost_level;
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unsigned int power_budget_limit;
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unsigned int power_threshold_inc;
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};
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struct exynos_hiu_data {
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bool enabled;
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bool pc_enabled;
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bool tb_enabled;
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bool hwidvfs_done;
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bool pb_delivered;
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int operation_mode;
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int irq;
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struct work_struct work;
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struct mutex lock;
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wait_queue_head_t hwidvfs_wait;
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wait_queue_head_t polling_wait;
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struct cpumask cpus;
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unsigned int cpu;
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unsigned int cur_budget;
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unsigned int cur_freq;
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unsigned int clipped_freq;
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unsigned int boost_threshold;
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unsigned int boost_max;
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unsigned int level_offset;
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unsigned int sw_pbl;
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void __iomem * base;
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struct device_node * dn;
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struct hiu_stats * stats;
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};
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#if defined(CONFIG_EXYNOS_PSTATE_HAFM) || defined(CONFIG_EXYNOS_PSTATE_HAFM_TB)
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extern int exynos_hiu_set_freq(unsigned int id, unsigned int req_freq);
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extern int exynos_hiu_get_freq(unsigned int id);
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extern int exynos_hiu_get_max_freq(void);
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#else
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inline int exynos_hiu_set_freq(unsigned int id, unsigned int req_freq) { return 0; }
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inline int exynos_hiu_get_freq(unsigned int id) { return 0; }
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inline int exynos_hiu_get_max_freq(void) { return 0; }
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#endif
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#endif
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