454 lines
11 KiB
C
454 lines
11 KiB
C
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/*
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* EPSON TOYOCOM RTC-7301SF/DG Driver
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*
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* Copyright (c) 2016 Akinobu Mita <akinobu.mita@gmail.com>
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*
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* Based on rtc-rp5c01.c
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*
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* Datasheet: http://www5.epsondevice.com/en/products/parallel/rtc7301sf.html
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*/
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/regmap.h>
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#include <linux/platform_device.h>
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#include <linux/rtc.h>
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#define DRV_NAME "rtc-r7301"
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#define RTC7301_1_SEC 0x0 /* Bank 0 and Band 1 */
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#define RTC7301_10_SEC 0x1 /* Bank 0 and Band 1 */
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#define RTC7301_AE BIT(3)
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#define RTC7301_1_MIN 0x2 /* Bank 0 and Band 1 */
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#define RTC7301_10_MIN 0x3 /* Bank 0 and Band 1 */
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#define RTC7301_1_HOUR 0x4 /* Bank 0 and Band 1 */
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#define RTC7301_10_HOUR 0x5 /* Bank 0 and Band 1 */
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#define RTC7301_DAY_OF_WEEK 0x6 /* Bank 0 and Band 1 */
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#define RTC7301_1_DAY 0x7 /* Bank 0 and Band 1 */
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#define RTC7301_10_DAY 0x8 /* Bank 0 and Band 1 */
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#define RTC7301_1_MONTH 0x9 /* Bank 0 */
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#define RTC7301_10_MONTH 0xa /* Bank 0 */
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#define RTC7301_1_YEAR 0xb /* Bank 0 */
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#define RTC7301_10_YEAR 0xc /* Bank 0 */
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#define RTC7301_100_YEAR 0xd /* Bank 0 */
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#define RTC7301_1000_YEAR 0xe /* Bank 0 */
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#define RTC7301_ALARM_CONTROL 0xe /* Bank 1 */
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#define RTC7301_ALARM_CONTROL_AIE BIT(0)
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#define RTC7301_ALARM_CONTROL_AF BIT(1)
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#define RTC7301_TIMER_CONTROL 0xe /* Bank 2 */
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#define RTC7301_TIMER_CONTROL_TIE BIT(0)
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#define RTC7301_TIMER_CONTROL_TF BIT(1)
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#define RTC7301_CONTROL 0xf /* All banks */
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#define RTC7301_CONTROL_BUSY BIT(0)
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#define RTC7301_CONTROL_STOP BIT(1)
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#define RTC7301_CONTROL_BANK_SEL_0 BIT(2)
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#define RTC7301_CONTROL_BANK_SEL_1 BIT(3)
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struct rtc7301_priv {
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struct regmap *regmap;
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int irq;
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spinlock_t lock;
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u8 bank;
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};
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static const struct regmap_config rtc7301_regmap_config = {
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.reg_bits = 32,
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.val_bits = 8,
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.reg_stride = 4,
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};
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static u8 rtc7301_read(struct rtc7301_priv *priv, unsigned int reg)
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{
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int reg_stride = regmap_get_reg_stride(priv->regmap);
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unsigned int val;
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regmap_read(priv->regmap, reg_stride * reg, &val);
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return val & 0xf;
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}
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static void rtc7301_write(struct rtc7301_priv *priv, u8 val, unsigned int reg)
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{
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int reg_stride = regmap_get_reg_stride(priv->regmap);
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regmap_write(priv->regmap, reg_stride * reg, val);
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}
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static void rtc7301_update_bits(struct rtc7301_priv *priv, unsigned int reg,
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u8 mask, u8 val)
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{
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int reg_stride = regmap_get_reg_stride(priv->regmap);
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regmap_update_bits(priv->regmap, reg_stride * reg, mask, val);
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}
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static int rtc7301_wait_while_busy(struct rtc7301_priv *priv)
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{
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int retries = 100;
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while (retries-- > 0) {
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u8 val;
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val = rtc7301_read(priv, RTC7301_CONTROL);
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if (!(val & RTC7301_CONTROL_BUSY))
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return 0;
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usleep_range(200, 300);
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}
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return -ETIMEDOUT;
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}
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static void rtc7301_stop(struct rtc7301_priv *priv)
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{
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rtc7301_update_bits(priv, RTC7301_CONTROL, RTC7301_CONTROL_STOP,
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RTC7301_CONTROL_STOP);
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}
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static void rtc7301_start(struct rtc7301_priv *priv)
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{
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rtc7301_update_bits(priv, RTC7301_CONTROL, RTC7301_CONTROL_STOP, 0);
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}
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static void rtc7301_select_bank(struct rtc7301_priv *priv, u8 bank)
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{
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u8 val = 0;
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if (bank == priv->bank)
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return;
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if (bank & BIT(0))
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val |= RTC7301_CONTROL_BANK_SEL_0;
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if (bank & BIT(1))
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val |= RTC7301_CONTROL_BANK_SEL_1;
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rtc7301_update_bits(priv, RTC7301_CONTROL,
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RTC7301_CONTROL_BANK_SEL_0 |
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RTC7301_CONTROL_BANK_SEL_1, val);
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priv->bank = bank;
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}
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static void rtc7301_get_time(struct rtc7301_priv *priv, struct rtc_time *tm,
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bool alarm)
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{
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int year;
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tm->tm_sec = rtc7301_read(priv, RTC7301_1_SEC);
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tm->tm_sec += (rtc7301_read(priv, RTC7301_10_SEC) & ~RTC7301_AE) * 10;
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tm->tm_min = rtc7301_read(priv, RTC7301_1_MIN);
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tm->tm_min += (rtc7301_read(priv, RTC7301_10_MIN) & ~RTC7301_AE) * 10;
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tm->tm_hour = rtc7301_read(priv, RTC7301_1_HOUR);
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tm->tm_hour += (rtc7301_read(priv, RTC7301_10_HOUR) & ~RTC7301_AE) * 10;
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tm->tm_mday = rtc7301_read(priv, RTC7301_1_DAY);
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tm->tm_mday += (rtc7301_read(priv, RTC7301_10_DAY) & ~RTC7301_AE) * 10;
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if (alarm) {
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tm->tm_wday = -1;
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tm->tm_mon = -1;
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tm->tm_year = -1;
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tm->tm_yday = -1;
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tm->tm_isdst = -1;
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return;
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}
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tm->tm_wday = (rtc7301_read(priv, RTC7301_DAY_OF_WEEK) & ~RTC7301_AE);
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tm->tm_mon = rtc7301_read(priv, RTC7301_10_MONTH) * 10 +
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rtc7301_read(priv, RTC7301_1_MONTH) - 1;
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year = rtc7301_read(priv, RTC7301_1000_YEAR) * 1000 +
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rtc7301_read(priv, RTC7301_100_YEAR) * 100 +
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rtc7301_read(priv, RTC7301_10_YEAR) * 10 +
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rtc7301_read(priv, RTC7301_1_YEAR);
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tm->tm_year = year - 1900;
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}
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static void rtc7301_write_time(struct rtc7301_priv *priv, struct rtc_time *tm,
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bool alarm)
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{
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int year;
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rtc7301_write(priv, tm->tm_sec % 10, RTC7301_1_SEC);
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rtc7301_write(priv, tm->tm_sec / 10, RTC7301_10_SEC);
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rtc7301_write(priv, tm->tm_min % 10, RTC7301_1_MIN);
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rtc7301_write(priv, tm->tm_min / 10, RTC7301_10_MIN);
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rtc7301_write(priv, tm->tm_hour % 10, RTC7301_1_HOUR);
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rtc7301_write(priv, tm->tm_hour / 10, RTC7301_10_HOUR);
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rtc7301_write(priv, tm->tm_mday % 10, RTC7301_1_DAY);
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rtc7301_write(priv, tm->tm_mday / 10, RTC7301_10_DAY);
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/* Don't care for alarm register */
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rtc7301_write(priv, alarm ? RTC7301_AE : tm->tm_wday,
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RTC7301_DAY_OF_WEEK);
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if (alarm)
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return;
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rtc7301_write(priv, (tm->tm_mon + 1) % 10, RTC7301_1_MONTH);
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rtc7301_write(priv, (tm->tm_mon + 1) / 10, RTC7301_10_MONTH);
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year = tm->tm_year + 1900;
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rtc7301_write(priv, year % 10, RTC7301_1_YEAR);
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rtc7301_write(priv, (year / 10) % 10, RTC7301_10_YEAR);
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rtc7301_write(priv, (year / 100) % 10, RTC7301_100_YEAR);
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rtc7301_write(priv, year / 1000, RTC7301_1000_YEAR);
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}
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static void rtc7301_alarm_irq(struct rtc7301_priv *priv, unsigned int enabled)
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{
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rtc7301_update_bits(priv, RTC7301_ALARM_CONTROL,
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RTC7301_ALARM_CONTROL_AF |
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RTC7301_ALARM_CONTROL_AIE,
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enabled ? RTC7301_ALARM_CONTROL_AIE : 0);
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}
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static int rtc7301_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct rtc7301_priv *priv = dev_get_drvdata(dev);
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unsigned long flags;
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int err;
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spin_lock_irqsave(&priv->lock, flags);
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rtc7301_select_bank(priv, 0);
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err = rtc7301_wait_while_busy(priv);
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if (!err)
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rtc7301_get_time(priv, tm, false);
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spin_unlock_irqrestore(&priv->lock, flags);
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return err ? err : rtc_valid_tm(tm);
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}
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static int rtc7301_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct rtc7301_priv *priv = dev_get_drvdata(dev);
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unsigned long flags;
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spin_lock_irqsave(&priv->lock, flags);
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rtc7301_stop(priv);
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usleep_range(200, 300);
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rtc7301_select_bank(priv, 0);
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rtc7301_write_time(priv, tm, false);
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rtc7301_start(priv);
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spin_unlock_irqrestore(&priv->lock, flags);
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return 0;
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}
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static int rtc7301_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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{
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struct rtc7301_priv *priv = dev_get_drvdata(dev);
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unsigned long flags;
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u8 alrm_ctrl;
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if (priv->irq <= 0)
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return -EINVAL;
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spin_lock_irqsave(&priv->lock, flags);
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rtc7301_select_bank(priv, 1);
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rtc7301_get_time(priv, &alarm->time, true);
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alrm_ctrl = rtc7301_read(priv, RTC7301_ALARM_CONTROL);
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alarm->enabled = !!(alrm_ctrl & RTC7301_ALARM_CONTROL_AIE);
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alarm->pending = !!(alrm_ctrl & RTC7301_ALARM_CONTROL_AF);
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spin_unlock_irqrestore(&priv->lock, flags);
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return 0;
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}
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static int rtc7301_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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{
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struct rtc7301_priv *priv = dev_get_drvdata(dev);
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unsigned long flags;
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if (priv->irq <= 0)
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return -EINVAL;
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spin_lock_irqsave(&priv->lock, flags);
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rtc7301_select_bank(priv, 1);
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rtc7301_write_time(priv, &alarm->time, true);
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rtc7301_alarm_irq(priv, alarm->enabled);
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spin_unlock_irqrestore(&priv->lock, flags);
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return 0;
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}
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static int rtc7301_alarm_irq_enable(struct device *dev, unsigned int enabled)
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{
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struct rtc7301_priv *priv = dev_get_drvdata(dev);
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unsigned long flags;
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if (priv->irq <= 0)
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return -EINVAL;
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spin_lock_irqsave(&priv->lock, flags);
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rtc7301_select_bank(priv, 1);
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rtc7301_alarm_irq(priv, enabled);
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spin_unlock_irqrestore(&priv->lock, flags);
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return 0;
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}
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static const struct rtc_class_ops rtc7301_rtc_ops = {
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.read_time = rtc7301_read_time,
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.set_time = rtc7301_set_time,
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.read_alarm = rtc7301_read_alarm,
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.set_alarm = rtc7301_set_alarm,
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.alarm_irq_enable = rtc7301_alarm_irq_enable,
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};
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static irqreturn_t rtc7301_irq_handler(int irq, void *dev_id)
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{
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struct rtc_device *rtc = dev_id;
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struct rtc7301_priv *priv = dev_get_drvdata(rtc->dev.parent);
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unsigned long flags;
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irqreturn_t ret = IRQ_NONE;
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u8 alrm_ctrl;
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spin_lock_irqsave(&priv->lock, flags);
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rtc7301_select_bank(priv, 1);
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alrm_ctrl = rtc7301_read(priv, RTC7301_ALARM_CONTROL);
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if (alrm_ctrl & RTC7301_ALARM_CONTROL_AF) {
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ret = IRQ_HANDLED;
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rtc7301_alarm_irq(priv, false);
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rtc_update_irq(rtc, 1, RTC_IRQF | RTC_AF);
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}
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spin_unlock_irqrestore(&priv->lock, flags);
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return ret;
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}
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static void rtc7301_init(struct rtc7301_priv *priv)
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{
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unsigned long flags;
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spin_lock_irqsave(&priv->lock, flags);
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rtc7301_select_bank(priv, 2);
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rtc7301_write(priv, 0, RTC7301_TIMER_CONTROL);
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spin_unlock_irqrestore(&priv->lock, flags);
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}
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static int __init rtc7301_rtc_probe(struct platform_device *dev)
|
||
|
|
{
|
||
|
|
struct resource *res;
|
||
|
|
void __iomem *regs;
|
||
|
|
struct rtc7301_priv *priv;
|
||
|
|
struct rtc_device *rtc;
|
||
|
|
int ret;
|
||
|
|
|
||
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|
res = platform_get_resource(dev, IORESOURCE_MEM, 0);
|
||
|
|
if (!res)
|
||
|
|
return -ENODEV;
|
||
|
|
|
||
|
|
priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
|
||
|
|
if (!priv)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
regs = devm_ioremap_resource(&dev->dev, res);
|
||
|
|
if (IS_ERR(regs))
|
||
|
|
return PTR_ERR(regs);
|
||
|
|
|
||
|
|
priv->regmap = devm_regmap_init_mmio(&dev->dev, regs,
|
||
|
|
&rtc7301_regmap_config);
|
||
|
|
if (IS_ERR(priv->regmap))
|
||
|
|
return PTR_ERR(priv->regmap);
|
||
|
|
|
||
|
|
priv->irq = platform_get_irq(dev, 0);
|
||
|
|
|
||
|
|
spin_lock_init(&priv->lock);
|
||
|
|
priv->bank = -1;
|
||
|
|
|
||
|
|
rtc7301_init(priv);
|
||
|
|
|
||
|
|
platform_set_drvdata(dev, priv);
|
||
|
|
|
||
|
|
rtc = devm_rtc_device_register(&dev->dev, DRV_NAME, &rtc7301_rtc_ops,
|
||
|
|
THIS_MODULE);
|
||
|
|
if (IS_ERR(rtc))
|
||
|
|
return PTR_ERR(rtc);
|
||
|
|
|
||
|
|
if (priv->irq > 0) {
|
||
|
|
ret = devm_request_irq(&dev->dev, priv->irq,
|
||
|
|
rtc7301_irq_handler, IRQF_SHARED,
|
||
|
|
dev_name(&dev->dev), rtc);
|
||
|
|
if (ret) {
|
||
|
|
priv->irq = 0;
|
||
|
|
dev_err(&dev->dev, "unable to request IRQ\n");
|
||
|
|
} else {
|
||
|
|
device_set_wakeup_capable(&dev->dev, true);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
#ifdef CONFIG_PM_SLEEP
|
||
|
|
|
||
|
|
static int rtc7301_suspend(struct device *dev)
|
||
|
|
{
|
||
|
|
struct rtc7301_priv *priv = dev_get_drvdata(dev);
|
||
|
|
|
||
|
|
if (device_may_wakeup(dev))
|
||
|
|
enable_irq_wake(priv->irq);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int rtc7301_resume(struct device *dev)
|
||
|
|
{
|
||
|
|
struct rtc7301_priv *priv = dev_get_drvdata(dev);
|
||
|
|
|
||
|
|
if (device_may_wakeup(dev))
|
||
|
|
disable_irq_wake(priv->irq);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif
|
||
|
|
|
||
|
|
static SIMPLE_DEV_PM_OPS(rtc7301_pm_ops, rtc7301_suspend, rtc7301_resume);
|
||
|
|
|
||
|
|
static const struct of_device_id rtc7301_dt_match[] = {
|
||
|
|
{ .compatible = "epson,rtc7301sf" },
|
||
|
|
{ .compatible = "epson,rtc7301dg" },
|
||
|
|
{}
|
||
|
|
};
|
||
|
|
MODULE_DEVICE_TABLE(of, rtc7301_dt_match);
|
||
|
|
|
||
|
|
static struct platform_driver rtc7301_rtc_driver = {
|
||
|
|
.driver = {
|
||
|
|
.name = DRV_NAME,
|
||
|
|
.of_match_table = rtc7301_dt_match,
|
||
|
|
.pm = &rtc7301_pm_ops,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
module_platform_driver_probe(rtc7301_rtc_driver, rtc7301_rtc_probe);
|
||
|
|
|
||
|
|
MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>");
|
||
|
|
MODULE_LICENSE("GPL");
|
||
|
|
MODULE_DESCRIPTION("EPSON TOYOCOM RTC-7301SF/DG Driver");
|
||
|
|
MODULE_ALIAS("platform:rtc-r7301");
|