113 lines
3.1 KiB
C
113 lines
3.1 KiB
C
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/*
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* Samsung EXYNOS CAMERA PostProcessing driver
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*
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* Copyright (C) 2016 Samsung Electronics Co., Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/io.h>
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#include "camerapp-sfr-api-common.h"
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/* #define DEBUG_CAMERA_PP_HW_SFR */
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int camerapp_log_level;
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module_param_named(camerapp_log_level, camerapp_log_level, uint, 0644);
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u32 camerapp_sfr_get_reg(void __iomem *base_addr, const struct camerapp_sfr_reg *reg)
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{
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u32 reg_value;
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reg_value = readl(base_addr + reg->sfr_offset);
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camerapp_dbg("[GET_REG] reg:[%s][0x%04X], reg_value(R):[0x%08X]\n",
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reg->reg_name, reg->sfr_offset, reg_value);
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return reg_value;
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}
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void camerapp_sfr_set_reg(void __iomem *base_addr, const struct camerapp_sfr_reg *reg, u32 val)
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{
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camerapp_dbg("[SET_REG] reg:[%s][0x%04X], reg_value(W):[0x%08X]\n",
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reg->reg_name, reg->sfr_offset, val);
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writel(val, base_addr + reg->sfr_offset);
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return;
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}
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u32 camerapp_sfr_get_field(void __iomem *base_addr, const struct camerapp_sfr_reg *reg,
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const struct camerapp_sfr_field *field)
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{
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u32 reg_value;
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u32 field_value;
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reg_value = readl(base_addr + reg->sfr_offset);
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field_value = camerapp_sfr_get_field_value(reg_value, field);
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camerapp_dbg("[GET_FIELD] reg:[%s][0x%04X], field:[%s] reg_value(R):[0x%08X] val(R):[%d]\n",
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reg->reg_name, reg->sfr_offset, field->field_name, reg_value, field_value);
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return field_value;
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}
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void camerapp_sfr_set_field(void __iomem *base_addr, const struct camerapp_sfr_reg *reg,
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const struct camerapp_sfr_field *field, u32 val)
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{
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u32 reg_value;
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/* previous value reading */
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reg_value = readl(base_addr + (reg->sfr_offset));
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reg_value = camerapp_sfr_set_field_value(reg_value, field, val);
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camerapp_dbg("[SET_FIELD] reg:[%s][0x%04X], field:[%s] reg_value(W):[0x%08X] val(W):[%d]\n",
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reg->reg_name, reg->sfr_offset, field->field_name, reg_value, val);
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/* store reg value */
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writel(reg_value, base_addr + (reg->sfr_offset));
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return;
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}
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u32 camerapp_sfr_get_field_value(u32 reg_value, const struct camerapp_sfr_field *field)
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{
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u32 field_mask = 0;
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u32 field_value = 0;
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field_mask = (field->bit_width >= 32) ? 0xFFFFFFFF : ((1 << field->bit_width) - 1);
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field_value = (reg_value >> (field->bit_start)) & (field_mask);
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return field_value;
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}
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u32 camerapp_sfr_set_field_value(u32 reg_value, const struct camerapp_sfr_field *field, u32 val)
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{
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u32 field_mask = 0;
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field_mask = (field->bit_width >= 32) ? 0xFFFFFFFF : ((1 << field->bit_width) - 1);
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/* bit clear */
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reg_value &= ~(field_mask << field->bit_start);
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/* setting value */
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reg_value |= (val & field_mask) << (field->bit_start);
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return reg_value;
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}
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void camerapp_sfr_dump_regs(void __iomem *base_addr, const struct camerapp_sfr_reg *regs, u32 total_cnt)
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{
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u32 i = 0;
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u32 reg_value = 0;
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for(i = 0; i < total_cnt; i++) {
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reg_value = readl(base_addr + regs[i].sfr_offset);
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camerapp_dbg("[DUMP] reg:[%s][0x%04X], value:[0x%08X]\n",
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regs[i].reg_name, regs[i].sfr_offset, reg_value);
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}
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return;
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}
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