212 lines
5.6 KiB
C
212 lines
5.6 KiB
C
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/*
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* Copyright (C) 2003 ATI Inc. <hyu@ati.com>
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* Copyright (C) 2004,2007 Bartlomiej Zolnierkiewicz
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*/
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/ide.h>
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#include <linux/init.h>
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#define DRV_NAME "atiixp"
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#define ATIIXP_IDE_PIO_TIMING 0x40
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#define ATIIXP_IDE_MDMA_TIMING 0x44
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#define ATIIXP_IDE_PIO_CONTROL 0x48
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#define ATIIXP_IDE_PIO_MODE 0x4a
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#define ATIIXP_IDE_UDMA_CONTROL 0x54
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#define ATIIXP_IDE_UDMA_MODE 0x56
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struct atiixp_ide_timing {
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u8 command_width;
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u8 recover_width;
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};
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static struct atiixp_ide_timing pio_timing[] = {
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{ 0x05, 0x0d },
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{ 0x04, 0x07 },
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{ 0x03, 0x04 },
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{ 0x02, 0x02 },
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{ 0x02, 0x00 },
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};
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static struct atiixp_ide_timing mdma_timing[] = {
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{ 0x07, 0x07 },
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{ 0x02, 0x01 },
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{ 0x02, 0x00 },
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};
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static DEFINE_SPINLOCK(atiixp_lock);
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/**
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* atiixp_set_pio_mode - set host controller for PIO mode
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* @hwif: port
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* @drive: drive
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*
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* Set the interface PIO mode.
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*/
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static void atiixp_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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unsigned long flags;
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int timing_shift = (drive->dn ^ 1) * 8;
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u32 pio_timing_data;
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u16 pio_mode_data;
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const u8 pio = drive->pio_mode - XFER_PIO_0;
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spin_lock_irqsave(&atiixp_lock, flags);
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pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
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pio_mode_data &= ~(0x07 << (drive->dn * 4));
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pio_mode_data |= (pio << (drive->dn * 4));
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pci_write_config_word(dev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
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pci_read_config_dword(dev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
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pio_timing_data &= ~(0xff << timing_shift);
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pio_timing_data |= (pio_timing[pio].recover_width << timing_shift) |
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(pio_timing[pio].command_width << (timing_shift + 4));
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pci_write_config_dword(dev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
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spin_unlock_irqrestore(&atiixp_lock, flags);
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}
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/**
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* atiixp_set_dma_mode - set host controller for DMA mode
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* @hwif: port
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* @drive: drive
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*
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* Set a ATIIXP host controller to the desired DMA mode. This involves
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* programming the right timing data into the PCI configuration space.
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*/
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static void atiixp_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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unsigned long flags;
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int timing_shift = (drive->dn ^ 1) * 8;
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u32 tmp32;
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u16 tmp16;
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u16 udma_ctl = 0;
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const u8 speed = drive->dma_mode;
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spin_lock_irqsave(&atiixp_lock, flags);
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pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &udma_ctl);
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if (speed >= XFER_UDMA_0) {
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pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16);
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tmp16 &= ~(0x07 << (drive->dn * 4));
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tmp16 |= ((speed & 0x07) << (drive->dn * 4));
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pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
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udma_ctl |= (1 << drive->dn);
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} else if (speed >= XFER_MW_DMA_0) {
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u8 i = speed & 0x03;
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pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32);
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tmp32 &= ~(0xff << timing_shift);
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tmp32 |= (mdma_timing[i].recover_width << timing_shift) |
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(mdma_timing[i].command_width << (timing_shift + 4));
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pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
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udma_ctl &= ~(1 << drive->dn);
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}
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pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, udma_ctl);
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spin_unlock_irqrestore(&atiixp_lock, flags);
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}
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static u8 atiixp_cable_detect(ide_hwif_t *hwif)
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{
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struct pci_dev *pdev = to_pci_dev(hwif->dev);
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u8 udma_mode = 0, ch = hwif->channel;
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pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode);
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if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40)
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return ATA_CBL_PATA80;
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else
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return ATA_CBL_PATA40;
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}
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static const struct ide_port_ops atiixp_port_ops = {
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.set_pio_mode = atiixp_set_pio_mode,
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.set_dma_mode = atiixp_set_dma_mode,
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.cable_detect = atiixp_cable_detect,
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};
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static const struct ide_port_info atiixp_pci_info[] = {
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{ /* 0: IXP200/300/400/700 */
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.name = DRV_NAME,
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.enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
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.port_ops = &atiixp_port_ops,
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.pio_mask = ATA_PIO4,
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.mwdma_mask = ATA_MWDMA2,
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.udma_mask = ATA_UDMA5,
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},
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{ /* 1: IXP600 */
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.name = DRV_NAME,
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.enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}},
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.port_ops = &atiixp_port_ops,
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.host_flags = IDE_HFLAG_SINGLE,
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.pio_mask = ATA_PIO4,
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.mwdma_mask = ATA_MWDMA2,
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.udma_mask = ATA_UDMA5,
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},
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};
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/**
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* atiixp_init_one - called when a ATIIXP is found
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* @dev: the atiixp device
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* @id: the matching pci id
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*
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* Called when the PCI registration layer (or the IDE initialization)
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* finds a device matching our IDE device tables.
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*/
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static int atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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{
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return ide_pci_init_one(dev, &atiixp_pci_info[id->driver_data], NULL);
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}
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static const struct pci_device_id atiixp_pci_tbl[] = {
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{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP200_IDE), 0 },
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{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP300_IDE), 0 },
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{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), 0 },
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{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), 1 },
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{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP700_IDE), 0 },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_HUDSON2_IDE), 0 },
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{ 0, },
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};
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MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl);
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static struct pci_driver atiixp_pci_driver = {
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.name = "ATIIXP_IDE",
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.id_table = atiixp_pci_tbl,
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.probe = atiixp_init_one,
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.remove = ide_pci_remove,
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.suspend = ide_pci_suspend,
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.resume = ide_pci_resume,
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};
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static int __init atiixp_ide_init(void)
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{
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return ide_pci_register_driver(&atiixp_pci_driver);
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}
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static void __exit atiixp_ide_exit(void)
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{
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pci_unregister_driver(&atiixp_pci_driver);
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}
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module_init(atiixp_ide_init);
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module_exit(atiixp_ide_exit);
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MODULE_AUTHOR("HUI YU");
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MODULE_DESCRIPTION("PCI driver module for ATI IXP IDE");
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MODULE_LICENSE("GPL");
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