67 lines
1.7 KiB
ArmAsm
67 lines
1.7 KiB
ArmAsm
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/* SPDX-License-Identifier: GPL-2.0 */
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! Copyright 2005,2006,2007,2009 Imagination Technologies
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#include <linux/init.h>
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#include <asm/metag_mem.h>
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#include <generated/asm-offsets.h>
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#undef __exit
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__HEAD
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! Setup the stack and get going into _metag_start_kernel
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.global __start
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.type __start,function
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__start:
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! D1Ar1 contains pTBI (ISTAT)
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! D0Ar2 contains pTBI
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! D1Ar3 contains __pTBISegs
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! D0Ar4 contains kernel arglist pointer
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MOVT D0Re0,#HI(___pTBIs)
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ADD D0Re0,D0Re0,#LO(___pTBIs)
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SETL [D0Re0],D0Ar2,D1Ar1
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MOVT D0Re0,#HI(___pTBISegs)
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ADD D0Re0,D0Re0,#LO(___pTBISegs)
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SETD [D0Re0],D1Ar3
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MOV A0FrP,#0
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MOV D0Re0,#0
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MOV D1Re0,#0
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MOV D1Ar3,#0
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MOV D1Ar1,D0Ar4 !Store kernel boot params
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MOV D1Ar5,#0
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MOV D0Ar6,#0
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#ifdef CONFIG_METAG_DSP
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MOV D0.8,#0
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#endif
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MOVT A0StP,#HI(_init_thread_union)
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ADD A0StP,A0StP,#LO(_init_thread_union)
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ADD A0StP,A0StP,#THREAD_INFO_SIZE
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MOVT D1RtP,#HI(_metag_start_kernel)
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CALL D1RtP,#LO(_metag_start_kernel)
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.size __start,.-__start
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!! Needed by TBX
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.global __exit
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.type __exit,function
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__exit:
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XOR TXENABLE,D0Re0,D0Re0
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.size __exit,.-__exit
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#ifdef CONFIG_SMP
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.global _secondary_startup
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.type _secondary_startup,function
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_secondary_startup:
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#if CONFIG_PAGE_OFFSET < LINGLOBAL_BASE
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! In case GCOn has just been turned on we need to fence any writes that
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! the boot thread might have performed prior to coherency taking effect.
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MOVT D0Re0,#HI(LINSYSEVENT_WR_ATOMIC_UNLOCK)
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MOV D1Re0,#0
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SETD [D0Re0], D1Re0
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#endif
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MOVT A0StP,#HI(_secondary_data_stack)
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ADD A0StP,A0StP,#LO(_secondary_data_stack)
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GETD A0StP,[A0StP]
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ADD A0StP,A0StP,#THREAD_INFO_SIZE
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B _secondary_start_kernel
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.size _secondary_startup,.-_secondary_startup
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#endif
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