206 lines
7.0 KiB
C
206 lines
7.0 KiB
C
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/*
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* sound/soc/codecs/rt5510.h
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*
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* Copyright (C) 2018 Richtek Technology Inc.
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* cy_huang <cy_huang@richtek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See http://www.gnu.org/licenses/gpl-2.0.html for more details.
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*/
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#ifndef __SND_SOC_RT5510_H
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#define __SND_SOC_RT5510_H
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#include <linux/mutex.h>
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#include <linux/rt-regmap.h>
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#ifdef CONFIG_SND_RICHTEK_SPM
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#include "richtek_spm_cls.h"
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#endif /* CONFIG_SND_RICHTEK_SPM */
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struct rt5510_chip {
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struct i2c_client *i2c;
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struct device *dev;
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struct snd_soc_codec *codec;
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struct platform_device *param_dev;
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struct rt_regmap_device *regmap;
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#ifdef CONFIG_SND_RICHTEK_SPM
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struct richtek_spm_classdev richtek_spm;
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#endif /* CONFIG_SND_RICHTEK_SPM */
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struct mutex var_lock;
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u16 chip_rev;
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u8 dev_cnt;
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int pwr_cnt;
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};
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int rt5510_codec_trigger_param_write(struct rt5510_chip *chip,
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void *param, int size);
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int rt5510_regmap_register(struct rt5510_chip *chip);
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void rt5510_regmap_unregister(struct rt5510_chip *chip);
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/* reg address divide into two parts [16:8] size, [7:0] addr */
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#define RT5510_GET_ADDR(_addr) ((_addr) & 0xff)
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#define RT5510_GET_SIZE(_addr) (((_addr) >> 8) & 0xff)
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#define RT5510_REG_DEVID (0x200)
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#define RT5510_REG_SERIAL_DATA_STATUS (0x101)
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#define RT5510_REG_BLOCK_CLK_CTRL (0x102)
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#define RT5510_REG_SYSTEM_CTRL (0x103)
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#define RT5510_REG_IRQ_EN (0x104)
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#define RT5510_REG_IRQ_STATUS1 (0x105)
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#define RT5510_REG_CRC_CHECK (0x106)
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#define RT5510_REG_ADDA_CLOCK (0x107)
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#define RT5510_REG_I2C_CTRL (0x108)
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#define RT5510_REG_IRQ_STATUS2 (0x109)
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#define RT5510_REG_SERIAL_CFG1 (0x110)
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#define RT5510_REG_SERIAL_CFG2 (0x111)
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#define RT5510_REG_DATAO_SEL (0x112)
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#define RT5510_REG_TDM_CFG1 (0x113)
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#define RT5510_REG_TDM_CFG2 (0x214)
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#define RT5510_REG_TDM_CFG3 (0x215)
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#define RT5510_REG_HPF_CTRL (0x118)
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#define RT5510_REG_HPF0_COEF (0x419)
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#define RT5510_REG_HPF1_COEF (0x41A)
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#define RT5510_REG_HPF2_COEF (0x41B)
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#define RT5510_REG_GISENS (0x21C)
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#define RT5510_REG_GVSENS (0x11D)
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#define RT5510_REG_PATH_BYPASS (0x11E)
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#define RT5510_REG_WDT_CTRL (0x120)
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#define RT5510_REG_HCLIP_CTRL (0x224)
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#define RT5510_REG_RAMP_CTRL (0x128)
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#define RT5510_REG_VOL_CTRL (0x129)
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#define RT5510_REG_SPS_CTRL (0x130)
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#define RT5510_REG_SG_CFG (0x231)
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#define RT5510_REG_SG_VOMIN (0x232)
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#define RT5510_REG_SIGMAX (0x233)
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#define RT5510_REG_SPSTH (0x334)
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#define RT5510_REG_TC_GAIN_M60 (0x238)
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#define RT5510_REG_TC_GAIN_M28 (0x239)
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#define RT5510_REG_TC_GAIN_P4 (0x23A)
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#define RT5510_REG_TC_GAIN_P36 (0x23B)
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#define RT5510_REG_TC_GAIN_P68 (0x23C)
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#define RT5510_REG_TC_GAIN_P100 (0x23D)
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#define RT5510_REG_TC_GAIN_P132 (0x23E)
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#define RT5510_REG_CALI_T0 (0x13F)
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#define RT5510_REG_BST_CTRL (0x140)
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#define RT5510_REG_BST_L1 (0x241)
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#define RT5510_REG_BST_L2 (0x242)
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#define RT5510_REG_BST_L3 (0x243)
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#define RT5510_REG_PSM_CTRL (0x144)
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#define RT5510_REG_CCMAX (0x145)
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#define RT5510_REG_PROTECTION_CFG (0x146)
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#define RT5510_REG_VPTAT (0x247)
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#define RT5510_REG_VBAT (0x148)
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#define RT5510_REG_BST_CFG1 (0x349)
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#define RT5510_REG_BST_CFG2 (0x24A)
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#define RT5510_REG_BST_CFG3 (0x14B)
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#define RT5510_REG_DA_GAIN (0x24C)
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#define RT5510_REG_FF_GAIN (0x24D)
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#define RT5510_REG_RLD_COEF1 (0x14E)
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#define RT5510_REG_RLD_COEF2 (0x14F)
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#define RT5510_REG_AUDIO_IN2_SEL (0x150)
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#define RT5510_REG_SIG_GAIN (0x151)
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#define RT5510_REG_IDAC1_TM (0x152)
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#define RT5510_REG_IDAC2_TM (0x153)
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#define RT5510_REG_IDAC3_TM (0x154)
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#define RT5510_REG_GVPTAT (0x255)
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#define RT5510_REG_IPEAK_LOW (0x156)
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#define RT5510_REG_GPWM_LV (0x157)
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#define RT5510_REG_VBT_SENSE (0x158)
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#define RT5510_REG_VPTAT_ADC_CODE (0x259)
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#define RT5510_REG_VBAT_ADC_CODE (0x25A)
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#define RT5510_REG_SUB_ADC_OFFSET (0x15B)
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#define RT5510_REG_IDAC_TM_CTRL (0x15C)
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#define RT5510_REG_IDAC_TEST_CODE (0x25D)
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#define RT5510_REG_IDAC_MONOTONIC (0x15E)
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#define RT5510_REG_PLL_CFG1 (0x160)
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#define RT5510_REG_PLL_CFG2 (0x161)
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#define RT5510_REG_PLL_CFG3 (0x162)
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#define RT5510_REG_PLL_CFG4 (0x163)
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#define RT5510_REG_PLL_RATIO (0x464)
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#define RT5510_REG_DRE_CTRL (0x168)
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#define RT5510_REG_DRE_THDMODE (0x169)
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#define RT5510_REG_DRE_TIMING (0x56A)
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#define RT5510_REG_DRE_CORASE (0x16B)
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#define RT5510_REG_PWM_CTRL (0x170)
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#define RT5510_REG_DC_PROTECT_CTRL (0x174)
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#define RT5510_REG_DITHER_CTRL (0x178)
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#define RT5510_REG_ADC_USB_MODE (0x17C)
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#define RT5510_REG_EFUSE_EN (0x180)
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#define RT5510_REG_EFUSE_CTRL (0x181)
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#define RT5510_REG_EFUSE_MAP (0x882)
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#define RT5510_REG_INTERNAL_CFG (0x188)
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#define RT5510_REG_DC_ADJ (0x189)
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#define RT5510_REG_ZC_CFG (0x18A)
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#define RT5510_REG_BG_CFG (0x18B)
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#define RT5510_REG_TM_EN (0x190)
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#define RT5510_REG_RAM_BIST_TST (0x191)
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#define RT5510_REG_SCAN_MODE (0x192)
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#define RT5510_REG_DBG_OUT_SEL1 (0x193)
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#define RT5510_REG_DBG_OUT_SEL2 (0x294)
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#define RT5510_REG_RESV0 (0x198)
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#define RT5510_REG_RESV1 (0x199)
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#define RT5510_REG_RESV2 (0x19A)
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#define RT5510_REG_RESV3 (0x19B)
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#define RT5510_REG_RESV4 (0x1A0)
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#define RT5510_REG_RESV5 (0x1A1)
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#define RT5510_REG_RESV6 (0x1A2)
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#define RT5510_REG_RESV7 (0x1A3)
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#define RT5510_REG_RESV8 (0x1A8)
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#define RT5510_REG_RESV9 (0x1A9)
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#define RT5510_REG_RESV10 (0x1B0)
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#define RT5510_REG_RESV11 (0x1B1)
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#define RT5510_REG_RESV12 (0x1B2)
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#define RT5510_REG_RESV13 (0x1B3)
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#define RT5510_REG_RESV14 (0x1B4)
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#define RT5510_REG_RESV15 (0x1B5)
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#define RT5510_REG_RESV16 (0x1B6)
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#define RT5510_REG_RESV17 (0x2B7)
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#define RT5510_REG_RESV18 (0x1B8)
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#define RT5510_REG_RESV19 (0x1B9)
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#define RT5510_REG_RESV20 (0x1BA)
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#define RT5510_REG_RESV21 (0x1BB)
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#define RT5510_REG_RESV22 (0x1BC)
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#define RT5510_REG_RESV23 (0x2BD)
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#define RT5510_REG_RESV24 (0x1BE)
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#define RT5510_REG_RESV25 (0x1BF)
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#define RT5510_REG_RESV26 (0x1C0)
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#define RT5510_REG_RESV27 (0x1C8)
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#define RT5510_REG_RESV28 (0x1D0)
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#define RT5510_REG_RESV29 (0x1D1)
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#define RT5510_REG_RESV30 (0x1D2)
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#define RT5510_REG_RESV31 (0x1D3)
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#define RT5510_REG_RESV32 (0x1D4)
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#define RT5510_REG_RESV33 (0x1D5)
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#define RT5510_REG_RESV34 (0x1D6)
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#define RT5510_REG_RESV35 (0x1D7)
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#define RT5510_REG_RESV36 (0x1D8)
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#define RT5510_REG_RESV37 (0x1D9)
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#define RT5510_REG_RESV38 (0x1DA)
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#define RT5510_REG_RESV39 (0x1DB)
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#define RT5510_REG_RESV40 (0x1E0)
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#define RT5510_REG_RESV41 (0x1E1)
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#define RT5510_REG_RESV42 (0x1E2)
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#define RT5510_REG_RESV43 (0x1E3)
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#define RT5510_REG_RESV44 (0x1E4)
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#define RT5510_REG_RESV45 (0x1E5)
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#define RT5510_REG_RESV46 (0x1E6)
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#define RT5510_REG_RESV47 (0x1E7)
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#define RT5510_REG_RESV48 (0x1E8)
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#define RT5510_REG_RESV49 (0x1E9)
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#define RT5510_REG_RESV50 (0x1EA)
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#define RT5510_REG_RESV51 (0x1EB)
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#define RT5510_REG_RESV52 (0x1EC)
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#define RT5510_REG_RESV53 (0x1ED)
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#define RT5510_REG_RESV54 (0x1EE)
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#define RT5510_REG_RESV55 (0x1EF)
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#define RT5510_REG_RESV56 (0x1F0)
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#endif /* __SND_SOC_RT5510_H */
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