118 lines
4.5 KiB
C
118 lines
4.5 KiB
C
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/*
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* Copyright (c) 2014 Samsung Electronics Co., Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Device Tree binding constants for Exynos System MMU.
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*/
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#ifndef _DT_BINDINGS_EXYNOS_SYSTEM_MMU_H
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#define _DT_BINDINGS_EXYNOS_SYSTEM_MMU_H
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/*
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* RESERVED field is used to define properties between DT and driver.
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*
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* CFG[13:12]
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* - 0x0 = Private way, ID matching
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* - 0x1 = Private way, Address matching
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* - 0x2 = Public way
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*/
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#define WAY_TYPE_MASK (0x3 << 12)
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#define _PRIVATE_WAY_ID (0x0 << 12)
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#define _PRIVATE_WAY_ADDR (0x1 << 12)
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#define _PUBLIC_WAY (0x2 << 12)
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#define _TARGET_NONE (0x0 << 8)
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#define _TARGET_READ (0x1 << 8)
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#define _TARGET_WRITE (0x2 << 8)
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#define _TARGET_READWRITE (0x3 << 8)
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#define _DIR_DESCENDING (0x0 << 2)
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#define _DIR_ASCENDING (0x1 << 2)
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#define _DIR_PREDICTION (0x2 << 2)
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#define _PREFETCH_ENABLE (0x1 << 1)
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#define _PREFETCH_DISABLE (0x0 << 1)
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#define _PORT_MASK(pmask) ((pmask) << 16)
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/*
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* Use below definitions for TLB properties setting.
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*
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* Each definition is combination of "configuration" and "ID".
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*
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* "configuration" is consist of public/private type and BL(Burst Length).
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* It should be expressed like (WAY_TYPE_DEFINE | BL_DEFINE).
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*
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* "ID" is meaningful for private ID matching only.
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* For public way and private addr matching, use SYSMMU_NOID.
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*
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* Here is an example.
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* In device tree, it is described like below.
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* sysmmu,tlb_property =
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* <(SYSMMU_PRIV_ID_PREFETCH_ASCENDING_READ | SYSMMU_BL32) SYSMMU_ID(0x1)>,
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* <(SYSMMU_PRIV_ADDR_NO_PREFETCH_READ | SYSMMU_BL16) SYSMMU_NOID>,
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* <(SYSMMU_PUBLIC_NO_PREFETCH | SYSMMU_BL16) SYSMMU_NOID>;
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*/
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/* Definitions for "ID" */
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#define SYSMMU_ID(id) (0xFFFF << 16 | (id))
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#define SYSMMU_ID_MASK(id,mask) ((mask) << 16 | (id))
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#define SYSMMU_NOID 0
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/* BL_DEFINE: Definitions for burst length "configuration". */
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#define SYSMMU_BL1 (0x0 << 5)
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#define SYSMMU_BL2 (0x1 << 5)
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#define SYSMMU_BL4 (0x2 << 5)
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#define SYSMMU_BL8 (0x3 << 5)
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#define SYSMMU_BL16 (0x4 << 5)
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#define SYSMMU_BL32 (0x5 << 5)
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/* WAY_TYPE_DEFINE: Definitions for public way "configuration". */
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#define SYSMMU_PUBLIC_NO_PREFETCH (_PUBLIC_WAY | _PREFETCH_DISABLE)
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#define SYSMMU_PUBLIC_PREFETCH_ASCENDING \
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(_PUBLIC_WAY | _PREFETCH_ENABLE | _DIR_ASCENDING)
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/* WAY_TYPE_DEFINE: Definitions for private ID matching "configuration". */
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#define SYSMMU_PRIV_ID_NO_PREFETCH_READ \
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(_PRIVATE_WAY_ID | _TARGET_READ | _PREFETCH_DISABLE)
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#define SYSMMU_PRIV_ID_NO_PREFETCH_WRITE \
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(_PRIVATE_WAY_ID | _TARGET_WRITE | _PREFETCH_DISABLE)
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#define SYSMMU_PRIV_ID_PREFETCH_ASCENDING_READ \
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(_PRIVATE_WAY_ID | _TARGET_READ | _DIR_ASCENDING | _PREFETCH_ENABLE)
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#define SYSMMU_PRIV_ID_PREFETCH_ASCENDING_WRITE \
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(_PRIVATE_WAY_ID | _TARGET_WRITE | _DIR_ASCENDING | _PREFETCH_ENABLE)
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#define SYSMMU_PRIV_ID_PREFETCH_PREDICTION_READ \
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(_PRIVATE_WAY_ID | _TARGET_READ | _DIR_PREDICTION | _PREFETCH_ENABLE)
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#define SYSMMU_PRIV_ID_PREFETCH_PREDICTION_WRITE \
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(_PRIVATE_WAY_ID | _TARGET_WRITE | _DIR_PREDICTION | _PREFETCH_ENABLE)
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/* WAY_TYPE_DEFINE: Definitions for private address matching "configuration". */
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#define SYSMMU_PRIV_ADDR_NO_PREFETCH_READ \
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(_PRIVATE_WAY_ADDR | _TARGET_READ | _PREFETCH_DISABLE)
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#define SYSMMU_PRIV_ADDR_NO_PREFETCH_WRITE \
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(_PRIVATE_WAY_ADDR | _TARGET_WRITE | _PREFETCH_DISABLE)
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#define SYSMMU_PRIV_ADDR_NO_PREFETCH_READWRITE \
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(_PRIVATE_WAY_ADDR | _TARGET_READWRITE | _PREFETCH_DISABLE)
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#define SYSMMU_PRIV_ADDR_PREFETCH_ASCENDING_READ \
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(_PRIVATE_WAY_ADDR | _TARGET_READ | _DIR_ASCENDING | _PREFETCH_ENABLE)
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/* PORT_TYPE_DEFINE: Definition for TLB port dedication "configuration". */
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#define SYSMMU_PORT_NO_PREFETCH_READ(pmask) \
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( _PORT_MASK(pmask) | _TARGET_READ | _PREFETCH_DISABLE)
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#define SYSMMU_PORT_NO_PREFETCH_WRITE(pmask) \
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( _PORT_MASK(pmask) | _TARGET_WRITE | _PREFETCH_DISABLE)
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#define SYSMMU_PORT_NO_PREFETCH_READWRITE(pmask) \
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( _PORT_MASK(pmask) | _TARGET_READWRITE | _PREFETCH_DISABLE)
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#define SYSMMU_PORT_PREFETCH_PREDICTION_READ(pmask) \
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( _PORT_MASK(pmask) | _TARGET_READ | _DIR_PREDICTION | _PREFETCH_ENABLE)
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#define SYSMMU_PORT_PREFETCH_PREDICTION_WRITE(pmask) \
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( _PORT_MASK(pmask) | _TARGET_WRITE | _DIR_PREDICTION | _PREFETCH_ENABLE)
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#define SYSMMU_PORT_PREFETCH_PREDICTION_READWRITE(pmask) \
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( _PORT_MASK(pmask) | _TARGET_READWRITE | _DIR_PREDICTION | _PREFETCH_ENABLE)
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#endif /* _DT_BINDINGS_EXYNOS_SYSTEM_MMU_H */
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