536 lines
13 KiB
C
536 lines
13 KiB
C
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/*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Header file for Exynos Scaler driver
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef SCALER__H_
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#define SCALER__H_
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#include <linux/delay.h>
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#include <linux/sched.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <linux/videodev2.h>
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#include <linux/videodev2_exynos_media.h>
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#include <linux/io.h>
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#include <linux/pm_qos.h>
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#include <linux/dma-buf.h>
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#include <media/videobuf2-core.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-mem2mem.h>
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#include <media/v4l2-ctrls.h>
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#include <soc/samsung/exynos-itmon.h>
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extern int sc_log_level;
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#define sc_dbg(fmt, args...) \
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do { \
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if (sc_log_level) \
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pr_debug("[%s:%d] " \
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fmt, __func__, __LINE__, ##args); \
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} while (0)
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#define MODULE_NAME "exynos5-scaler"
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#define SC_MAX_DEVS 1
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#define SC_TIMEOUT (2 * HZ) /* 2 seconds */
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#define SC_WDT_CNT 3
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#define SC_MAX_CTRL_NUM 11
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#define SC_MAX_PLANES 3
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/* Address index */
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#define SC_ADDR_RGB 0
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#define SC_ADDR_Y 0
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#define SC_ADDR_CB 1
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#define SC_ADDR_CBCR 1
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#define SC_ADDR_CR 2
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/* Scaler hardware device state */
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#define DEV_RUN 1
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#define DEV_SUSPEND 2
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#define DEV_CP 4 /* contents path protection */
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/* Scaler m2m context state */
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#define CTX_PARAMS 1
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#define CTX_STREAMING 2
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#define CTX_RUN 3
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#define CTX_ABORT 4
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#define CTX_SRC_FMT 5
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#define CTX_DST_FMT 6
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#define CTX_INT_FRAME 7 /* intermediate frame available */
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#define CTX_INT_FRAME_CP 8 /* intermediate frame available */
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/* CSC equation */
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#define SC_CSC_NARROW 0
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#define SC_CSC_WIDE 1
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/* Scaler Crop Fixed Point value */
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#define SC_CROP_FRACT_SHIFT 15
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#define SC_CROP_FRACT_MULTI 16
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#define SC_CROP_FRACT_MASK ((1 << SC_CROP_FRACT_MULTI) - 1)
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#define SC_CROP_INT_MASK ((1 << SC_CROP_FRACT_SHIFT) - 1)
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#define SC_CROP_GET_FR_VAL(x) ((x >> SC_CROP_FRACT_SHIFT) & SC_CROP_FRACT_MASK)
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#define SC_CROP_MAKE_FR_VAL(i, f) ((((f) & SC_CROP_FRACT_MASK) \
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<< SC_CROP_FRACT_SHIFT) | ((i) & SC_CROP_INT_MASK))
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#define fh_to_sc_ctx(__fh) container_of(__fh, struct sc_ctx, fh)
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#define sc_fmt_is_rgb888(x) ((x == V4L2_PIX_FMT_RGB32) || \
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(x == V4L2_PIX_FMT_BGR32))
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#define sc_fmt_is_yuv422(x) ((x == V4L2_PIX_FMT_YUYV) || \
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(x == V4L2_PIX_FMT_UYVY) || (x == V4L2_PIX_FMT_YVYU) || \
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(x == V4L2_PIX_FMT_YUV422P) || (x == V4L2_PIX_FMT_NV16) || \
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(x == V4L2_PIX_FMT_NV61))
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#define sc_fmt_is_yuv420(x) ((x == V4L2_PIX_FMT_YUV420) || \
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(x == V4L2_PIX_FMT_YVU420) || (x == V4L2_PIX_FMT_NV12) || \
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(x == V4L2_PIX_FMT_NV21) || (x == V4L2_PIX_FMT_NV12M) || \
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(x == V4L2_PIX_FMT_NV21M) || (x == V4L2_PIX_FMT_YUV420M) || \
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(x == V4L2_PIX_FMT_YVU420M) || (x == V4L2_PIX_FMT_NV12MT_16X16))
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#define sc_fmt_is_ayv12(x) ((x) == V4L2_PIX_FMT_YVU420)
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#define sc_fmt_is_s10bit_yuv(x) ((x == V4L2_PIX_FMT_NV12M_S10B) || \
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(x == V4L2_PIX_FMT_NV12N_10B) || (x == V4L2_PIX_FMT_NV16M_S10B) || \
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(x == V4L2_PIX_FMT_NV61M_S10B))
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#define sc_dith_val(a, b, c) ((a << SCALER_DITH_R_SHIFT) | \
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(b << SCALER_DITH_G_SHIFT) | (c << SCALER_DITH_B_SHIFT))
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#define SCALER_VERSION(x, y, z) (((x) << 16) | ((y) << 8) | (z))
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#define SC_FMT_PREMULTI_FLAG 10
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/* for blend operation */
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#define V4L2_CID_GLOBAL_ALPHA (V4L2_CID_EXYNOS_BASE + 1)
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#define V4L2_CID_2D_BLEND_OP (V4L2_CID_EXYNOS_BASE + 103)
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#define V4L2_CID_2D_COLOR_FILL (V4L2_CID_EXYNOS_BASE + 104)
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#define V4L2_CID_2D_DITH (V4L2_CID_EXYNOS_BASE + 105)
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#define V4L2_CID_2D_FMT_PREMULTI (V4L2_CID_EXYNOS_BASE + 106)
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/* for performance */
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#define SC_CID_FRAMERATE (V4L2_CID_EXYNOS_BASE + 110)
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#define SC_FRAMERATE_MAX (500)
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/* for denoising filter */
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#define SC_CID_DNOISE_FT (V4L2_CID_EXYNOS_BASE + 150)
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#define SC_M2M1SHOT_OP_FILTER_SHIFT (28)
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#define SC_M2M1SHOT_OP_FILTER_MASK (0xf << 28)
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enum sc_csc_idx {
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NO_CSC,
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CSC_Y2R,
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CSC_R2Y,
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};
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struct sc_csc_tab {
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int narrow_601[9];
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int wide_601[9];
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int narrow_709[9];
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int wide_709[9];
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int narrow_2020[9];
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int wide_2020[9];
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};
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enum sc_clk_status {
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SC_CLK_ON,
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SC_CLK_OFF,
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};
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enum sc_clocks {
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SC_GATE_CLK,
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SC_CHLD_CLK,
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SC_PARN_CLK
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};
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enum sc_dith {
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SC_DITH_NO,
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SC_DITH_8BIT,
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SC_DITH_6BIT,
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SC_DITH_5BIT,
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SC_DITH_4BIT,
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};
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/*
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* blending operation
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* The order is from Android PorterDuff.java
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*/
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enum sc_blend_op {
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/* [0, 0] */
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BL_OP_CLR = 1,
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/* [Sa, Sc] */
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BL_OP_SRC,
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/* [Da, Dc] */
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BL_OP_DST,
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/* [Sa + (1 - Sa)*Da, Rc = Sc + (1 - Sa)*Dc] */
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BL_OP_SRC_OVER,
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/* [Sa + (1 - Sa)*Da, Rc = Dc + (1 - Da)*Sc] */
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BL_OP_DST_OVER,
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/* [Sa * Da, Sc * Da] */
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BL_OP_SRC_IN,
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/* [Sa * Da, Sa * Dc] */
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BL_OP_DST_IN,
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/* [Sa * (1 - Da), Sc * (1 - Da)] */
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BL_OP_SRC_OUT,
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/* [Da * (1 - Sa), Dc * (1 - Sa)] */
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BL_OP_DST_OUT,
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/* [Da, Sc * Da + (1 - Sa) * Dc] */
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BL_OP_SRC_ATOP,
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/* [Sa, Sc * (1 - Da) + Sa * Dc ] */
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BL_OP_DST_ATOP,
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/* [-(Sa * Da), Sc * (1 - Da) + (1 - Sa) * Dc] */
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BL_OP_XOR,
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/* [Sa + Da - Sa*Da, Sc*(1 - Da) + Dc*(1 - Sa) + min(Sc, Dc)] */
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BL_OP_DARKEN,
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/* [Sa + Da - Sa*Da, Sc*(1 - Da) + Dc*(1 - Sa) + max(Sc, Dc)] */
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BL_OP_LIGHTEN,
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/** [Sa * Da, Sc * Dc] */
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BL_OP_MULTIPLY,
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/* [Sa + Da - Sa * Da, Sc + Dc - Sc * Dc] */
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BL_OP_SCREEN,
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/* Saturate(S + D) */
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BL_OP_ADD,
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};
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/*
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* Co = <src color op> * Cs + <dst color op> * Cd
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* Ao = <src_alpha_op> * As + <dst_color_op> * Ad
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*/
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#define BL_INV_BIT_OFFSET 0x10
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enum sc_bl_comp {
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ONE = 0,
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SRC_A,
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SRC_C,
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DST_A,
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SRC_GA = 0x5,
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INV_SA = 0x11,
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INV_SC,
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INV_DA,
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INV_SAGA = 0x17,
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ZERO = 0xff,
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};
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struct sc_bl_op_val {
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u32 src_color;
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u32 src_alpha;
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u32 dst_color;
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u32 dst_alpha;
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};
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/*
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* struct sc_size_limit - Scaler variant size information
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*
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* @min_w: minimum pixel width size
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* @min_h: minimum pixel height size
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* @max_w: maximum pixel width size
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* @max_h: maximum pixel height size
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*/
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struct sc_size_limit {
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u16 min_w;
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u16 min_h;
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u16 max_w;
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u16 max_h;
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};
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struct sc_variant {
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struct sc_size_limit limit_input;
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struct sc_size_limit limit_output;
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u32 version;
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u32 sc_up_max;
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u32 sc_down_min;
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u32 sc_up_swmax;
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u32 sc_down_swmin;
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u8 blending:1;
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u8 prescale:1;
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u8 ratio_20bit:1;
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u8 initphase:1;
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u8 pixfmt_10bit:1;
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u8 extra_buf:1;
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};
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/*
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* struct sc_fmt - the driver's internal color format data
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* @name: format description
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* @pixelformat: the fourcc code for this format, 0 if not applicable
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* @num_planes: number of physically non-contiguous data planes
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* @num_comp: number of color components(ex. RGB, Y, Cb, Cr)
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* @h_div: horizontal division value of C against Y for crop
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* @v_div: vertical division value of C against Y for crop
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* @bitperpixel: bits per pixel
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* @color: the corresponding sc_color_fmt
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*/
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struct sc_fmt {
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char *name;
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u32 pixelformat;
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u32 cfg_val;
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u8 bitperpixel[SC_MAX_PLANES];
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u8 num_planes:2;
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u8 num_comp:2;
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u8 h_shift:1;
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u8 v_shift:1;
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u8 is_rgb:1;
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u8 cspan:1;
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};
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enum {
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SC_PLANE_Y = 0,
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SC_PLANE_CB,
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SC_PLANE_CR,
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};
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struct sc_addr {
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dma_addr_t ioaddr[SC_MAX_PLANES];
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unsigned int size[SC_MAX_PLANES];
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};
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/*
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* struct sc_frame - source/target frame properties
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* @fmt: buffer format(like virtual screen)
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* @crop: image size / position
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* @addr: buffer start address(access using SC_ADDR_XXX)
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* @bytesused: image size in bytes (w x h x bpp)
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*/
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struct sc_frame {
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const struct sc_fmt *sc_fmt;
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unsigned short width;
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unsigned short height;
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__u32 pixelformat;
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struct v4l2_rect crop;
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struct sc_addr addr;
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__u32 bytesused[SC_MAX_PLANES];
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bool pre_multi;
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};
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struct sc_int_frame {
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struct sc_frame frame;
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struct sc_addr src_addr;
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struct sc_addr dst_addr;
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struct sg_table *sgt[3];
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struct dma_buf *dma_buf[3];
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struct dma_buf_attachment *attachment[3];
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};
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/*
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* struct sc_m2m_device - v4l2 memory-to-memory device data
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* @v4l2_dev: v4l2 device
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* @vfd: the video device node
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* @m2m_dev: v4l2 memory-to-memory device data
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* @in_use: the open count
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*/
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struct sc_m2m_device {
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struct v4l2_device v4l2_dev;
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struct video_device *vfd;
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struct v4l2_m2m_dev *m2m_dev;
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atomic_t in_use;
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};
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struct sc_wdt {
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struct timer_list timer;
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atomic_t cnt;
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};
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struct sc_csc {
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unsigned int csc_eq;
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bool csc_range;
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};
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struct sc_init_phase {
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u32 yh;
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u32 yv;
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u32 ch;
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u32 cv;
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u32 w;
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u32 h;
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};
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||
|
|
enum sc_ft {
|
||
|
|
SC_FT_NONE = 0,
|
||
|
|
SC_FT_BLUR,
|
||
|
|
SC_FT_240,
|
||
|
|
SC_FT_480,
|
||
|
|
SC_FT_720,
|
||
|
|
SC_FT_960,
|
||
|
|
SC_FT_1080,
|
||
|
|
SC_FT_MAX,
|
||
|
|
};
|
||
|
|
|
||
|
|
struct sc_dnoise_filter {
|
||
|
|
u32 strength;
|
||
|
|
u32 w;
|
||
|
|
u32 h;
|
||
|
|
};
|
||
|
|
|
||
|
|
struct sc_qos_table {
|
||
|
|
unsigned int freq_mif;
|
||
|
|
unsigned int freq_int;
|
||
|
|
unsigned int data_size;
|
||
|
|
};
|
||
|
|
|
||
|
|
struct sc_ctx;
|
||
|
|
|
||
|
|
/*
|
||
|
|
* struct sc_dev - the abstraction for Rotator device
|
||
|
|
* @dev: pointer to the Rotator device
|
||
|
|
* @variant: the IP variant information
|
||
|
|
* @m2m: memory-to-memory V4L2 device information
|
||
|
|
* @aclk: aclk required for scaler operation
|
||
|
|
* @pclk: pclk required for scaler operation
|
||
|
|
* @clk_chld: child clk of mux required for scaler operation
|
||
|
|
* @clk_parn: parent clk of mux required for scaler operation
|
||
|
|
* @regs: the mapped hardware registers
|
||
|
|
* @regs_res: the resource claimed for IO registers
|
||
|
|
* @wait: interrupt handler waitqueue
|
||
|
|
* @ws: work struct
|
||
|
|
* @state: device state flags
|
||
|
|
* @alloc_ctx: videobuf2 memory allocator context
|
||
|
|
* @slock: the spinlock pscecting this data structure
|
||
|
|
* @lock: the mutex pscecting this data structure
|
||
|
|
* @wdt: watchdog timer information
|
||
|
|
* @version: IP version number
|
||
|
|
* @cfw: cfw flag
|
||
|
|
* @pb_disable: prefetch-buffer disable flag
|
||
|
|
*/
|
||
|
|
struct sc_dev {
|
||
|
|
struct device *dev;
|
||
|
|
const struct sc_variant *variant;
|
||
|
|
struct sc_m2m_device m2m;
|
||
|
|
struct m2m1shot_device *m21dev;
|
||
|
|
struct clk *aclk;
|
||
|
|
struct clk *pclk;
|
||
|
|
struct clk *clk_chld;
|
||
|
|
struct clk *clk_parn;
|
||
|
|
void __iomem *regs;
|
||
|
|
struct resource *regs_res;
|
||
|
|
struct workqueue_struct *qosclr_int_wq;
|
||
|
|
wait_queue_head_t wait;
|
||
|
|
unsigned long state;
|
||
|
|
struct vb2_alloc_ctx *alloc_ctx;
|
||
|
|
spinlock_t slock;
|
||
|
|
struct mutex lock;
|
||
|
|
struct sc_wdt wdt;
|
||
|
|
spinlock_t ctxlist_lock;
|
||
|
|
struct sc_ctx *current_ctx;
|
||
|
|
struct list_head context_list; /* for sc_ctx_abs.node */
|
||
|
|
struct pm_qos_request qosreq_int;
|
||
|
|
s32 qosreq_int_level;
|
||
|
|
int dev_id;
|
||
|
|
u32 version;
|
||
|
|
bool pb_disable;
|
||
|
|
u32 cfw;
|
||
|
|
struct sc_qos_table *qos_table;
|
||
|
|
int qos_table_cnt;
|
||
|
|
struct notifier_block itmon_nb;
|
||
|
|
};
|
||
|
|
|
||
|
|
enum SC_CONTEXT_TYPE {
|
||
|
|
SC_CTX_V4L2_TYPE,
|
||
|
|
SC_CTX_M2M1SHOT_TYPE
|
||
|
|
};
|
||
|
|
|
||
|
|
struct sc_qos_request {
|
||
|
|
struct pm_qos_request mif_req;
|
||
|
|
struct pm_qos_request int_req;
|
||
|
|
};
|
||
|
|
|
||
|
|
/*
|
||
|
|
* sc_ctx - the abstration for Rotator open context
|
||
|
|
* @node: list to be added to sc_dev.context_list
|
||
|
|
* @context_type determines if the context is @m2m_ctx or @m21_ctx.
|
||
|
|
* @sc_dev: the Rotator device this context applies to
|
||
|
|
* @m2m_ctx: memory-to-memory device context
|
||
|
|
* @m21_ctx: m2m1shot context
|
||
|
|
* @frame: source frame properties
|
||
|
|
* @ctrl_handler: v4l2 controls handler
|
||
|
|
* @fh: v4l2 file handle
|
||
|
|
* @ktime: start time of a task of m2m1shot
|
||
|
|
* @flip_rot_cfg: rotation and flip configuration
|
||
|
|
* @bl_op: image blend mode
|
||
|
|
* @dith: image dithering mode
|
||
|
|
* @g_alpha: global alpha value
|
||
|
|
* @color_fill: enable color fill
|
||
|
|
* @flags: context state flags
|
||
|
|
* @pre_multi: pre-multiplied format
|
||
|
|
* @csc: csc equation value
|
||
|
|
*/
|
||
|
|
struct sc_ctx {
|
||
|
|
struct list_head node;
|
||
|
|
enum SC_CONTEXT_TYPE context_type;
|
||
|
|
struct sc_dev *sc_dev;
|
||
|
|
union {
|
||
|
|
struct v4l2_m2m_ctx *m2m_ctx;
|
||
|
|
struct m2m1shot_context *m21_ctx;
|
||
|
|
};
|
||
|
|
struct sc_frame s_frame;
|
||
|
|
struct sc_int_frame *i_frame;
|
||
|
|
struct sc_frame d_frame;
|
||
|
|
struct v4l2_ctrl_handler ctrl_handler;
|
||
|
|
union {
|
||
|
|
struct v4l2_fh fh;
|
||
|
|
ktime_t ktime_m2m1shot;
|
||
|
|
};
|
||
|
|
u32 flip_rot_cfg; /* SCALER_ROT_CFG */
|
||
|
|
enum sc_blend_op bl_op;
|
||
|
|
u32 dith;
|
||
|
|
u32 g_alpha;
|
||
|
|
bool color_fill;
|
||
|
|
unsigned int h_ratio;
|
||
|
|
unsigned int v_ratio;
|
||
|
|
unsigned int pre_h_ratio;
|
||
|
|
unsigned int pre_v_ratio;
|
||
|
|
unsigned long flags;
|
||
|
|
bool pre_multi;
|
||
|
|
bool cp_enabled;
|
||
|
|
struct sc_csc csc;
|
||
|
|
struct sc_init_phase init_phase;
|
||
|
|
struct sc_dnoise_filter dnoise_ft;
|
||
|
|
struct sc_qos_request pm_qos;
|
||
|
|
int pm_qos_lv;
|
||
|
|
int framerate;
|
||
|
|
};
|
||
|
|
|
||
|
|
static inline struct sc_frame *ctx_get_frame(struct sc_ctx *ctx,
|
||
|
|
enum v4l2_buf_type type)
|
||
|
|
{
|
||
|
|
struct sc_frame *frame;
|
||
|
|
|
||
|
|
if (V4L2_TYPE_IS_MULTIPLANAR(type)) {
|
||
|
|
if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
|
||
|
|
frame = &ctx->s_frame;
|
||
|
|
else
|
||
|
|
frame = &ctx->d_frame;
|
||
|
|
} else {
|
||
|
|
dev_err(ctx->sc_dev->dev,
|
||
|
|
"Wrong V4L2 buffer type %d\n", type);
|
||
|
|
return ERR_PTR(-EINVAL);
|
||
|
|
}
|
||
|
|
|
||
|
|
return frame;
|
||
|
|
}
|
||
|
|
|
||
|
|
int sc_hwset_src_image_format(struct sc_dev *sc, const struct sc_fmt *);
|
||
|
|
int sc_hwset_dst_image_format(struct sc_dev *sc, const struct sc_fmt *);
|
||
|
|
void sc_hwset_pre_multi_format(struct sc_dev *sc, bool src, bool dst);
|
||
|
|
void sc_hwset_blend(struct sc_dev *sc, enum sc_blend_op bl_op, bool pre_multi,
|
||
|
|
unsigned char g_alpha);
|
||
|
|
void sc_hwset_color_fill(struct sc_dev *sc, unsigned int val);
|
||
|
|
void sc_hwset_dith(struct sc_dev *sc, unsigned int val);
|
||
|
|
void sc_hwset_csc_coef(struct sc_dev *sc, enum sc_csc_idx idx,
|
||
|
|
struct sc_csc *csc);
|
||
|
|
void sc_hwset_src_imgsize(struct sc_dev *sc, struct sc_frame *frame);
|
||
|
|
void sc_hwset_dst_imgsize(struct sc_dev *sc, struct sc_frame *frame);
|
||
|
|
void sc_hwset_src_crop(struct sc_dev *sc, struct v4l2_rect *rect,
|
||
|
|
const struct sc_fmt *fmt,
|
||
|
|
unsigned int pre_h_ratio, unsigned int pre_v_ratio);
|
||
|
|
void sc_hwset_dst_crop(struct sc_dev *sc, struct v4l2_rect *rect);
|
||
|
|
void sc_hwset_src_addr(struct sc_dev *sc, struct sc_frame *frame);
|
||
|
|
void sc_hwset_dst_addr(struct sc_dev *sc, struct sc_frame *frame);
|
||
|
|
void sc_hwset_hcoef(struct sc_dev *sc, unsigned int coef);
|
||
|
|
void sc_hwset_vcoef(struct sc_dev *sc, unsigned int coef);
|
||
|
|
|
||
|
|
void sc_hwregs_dump(struct sc_dev *sc);
|
||
|
|
void sc_ctx_dump(struct sc_ctx *ctx);
|
||
|
|
|
||
|
|
#endif /* SCALER__H_ */
|